From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F14BDC65C30 for ; Sun, 7 Oct 2018 09:40:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B465E20895 for ; Sun, 7 Oct 2018 09:40:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B465E20895 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=siol.net Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728591AbeJGQrD (ORCPT ); Sun, 7 Oct 2018 12:47:03 -0400 Received: from mailoutvs5.siol.net ([185.57.226.196]:40141 "EHLO mail.siol.net" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728371AbeJGQrC (ORCPT ); Sun, 7 Oct 2018 12:47:02 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.siol.net (Postfix) with ESMTP id B6E2D520049; Sun, 7 Oct 2018 11:40:17 +0200 (CEST) X-Virus-Scanned: amavisd-new at psrvmta10.zcs-production.pri Received: from mail.siol.net ([127.0.0.1]) by localhost (psrvmta10.zcs-production.pri [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id hE23f8ymFSXZ; Sun, 7 Oct 2018 11:40:17 +0200 (CEST) Received: from mail.siol.net (localhost [127.0.0.1]) by mail.siol.net (Postfix) with ESMTPS id 6CD52520456; Sun, 7 Oct 2018 11:40:17 +0200 (CEST) Received: from localhost.localdomain (cpe1-8-82.cable.triera.net [213.161.8.82]) (Authenticated sender: 031275009) by mail.siol.net (Postfix) with ESMTPSA id 0128F520A87; Sun, 7 Oct 2018 11:40:14 +0200 (CEST) From: Jernej Skrabec To: maxime.ripard@bootlin.com, wens@csie.org Cc: robh+dt@kernel.org, sboyd@kernel.org, airlied@linux.ie, architt@codeaurora.org, a.hajda@samsung.com, Laurent.pinchart@ideasonboard.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com Subject: [PATCH v2 24/29] drm/sun4i: Initialize registers in tcon-top driver Date: Sun, 7 Oct 2018 11:39:00 +0200 Message-Id: <20181007093905.11253-25-jernej.skrabec@siol.net> X-Mailer: git-send-email 2.19.0 In-Reply-To: <20181007093905.11253-1-jernej.skrabec@siol.net> References: <20181007093905.11253-1-jernej.skrabec@siol.net> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org It turns out that TCON TOP registers in H6 SoC have non-zero reset value. This may cause issues if bits are not changed during configuration. To prevent that, initialize registers to 0. Signed-off-by: Jernej Skrabec --- drivers/gpu/drm/sun4i/sun8i_tcon_top.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c b/drivers/gpu/drm/sun= 4i/sun8i_tcon_top.c index 3040a79f298f..37158548b447 100644 --- a/drivers/gpu/drm/sun4i/sun8i_tcon_top.c +++ b/drivers/gpu/drm/sun4i/sun8i_tcon_top.c @@ -167,6 +167,13 @@ static int sun8i_tcon_top_bind(struct device *dev, s= truct device *master, goto err_assert_reset; } =20 + /* + * At least on H6, some registers have some bits set by default + * which may cause issues. Clear them here. + */ + writel(0, regs + TCON_TOP_PORT_SEL_REG); + writel(0, regs + TCON_TOP_GATE_SRC_REG); + /* * TCON TOP has two muxes, which select parent clock for each TCON TV * channel clock. Parent could be either TCON TV or TVE clock. For now --=20 2.19.0