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From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
To: linux-kernel@vger.kernel.org
Cc: x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Borislav Petkov <bp@alien8.de>,
	Sebastian Andrzej Siewior <bigeasy@linutronix.de>,
	stable@vger.kernel.org
Subject: [PATCH 3/3] x86/fpu: Save FPU registers on context switch if there is a FPU
Date: Tue, 16 Oct 2018 22:25:25 +0200	[thread overview]
Message-ID: <20181016202525.29437-4-bigeasy@linutronix.de> (raw)
In-Reply-To: <20181016202525.29437-1-bigeasy@linutronix.de>

Booting a 486 with "no387 nofxsr" ends with
| math_emulate: 0060:c101987d
| Kernel panic - not syncing: Math emulation needed in kernel

on the first context switch in user land. The reason is that
copy_fpregs_to_fpstate() tries `fnsave' which does not work. This
happens since commit f1c8cd0176078 ("x86/fpu: Change fpu->fpregs_active
users to fpu->fpstate_active").

Add a check for X86_FEATURE_FPU before trying to save FPU registers (we
have such a check switch_fpu_finish() already).

Fixes: f1c8cd0176078 ("x86/fpu: Change fpu->fpregs_active users to fpu->fpstate_active")
Cc: stable@vger.kernel.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
---
 arch/x86/include/asm/fpu/internal.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/fpu/internal.h b/arch/x86/include/asm/fpu/internal.h
index a38bf5a1e37ad..69dcdf195b611 100644
--- a/arch/x86/include/asm/fpu/internal.h
+++ b/arch/x86/include/asm/fpu/internal.h
@@ -528,7 +528,7 @@ static inline void fpregs_activate(struct fpu *fpu)
 static inline void
 switch_fpu_prepare(struct fpu *old_fpu, int cpu)
 {
-	if (old_fpu->initialized) {
+	if (static_cpu_has(X86_FEATURE_FPU) && old_fpu->initialized) {
 		if (!copy_fpregs_to_fpstate(old_fpu))
 			old_fpu->last_cpu = -1;
 		else
-- 
2.19.1


  parent reply	other threads:[~2018-10-16 20:26 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-16 20:25 [0/3] A few 32bit x86 fixes Sebastian Andrzej Siewior
2018-10-16 20:25 ` [PATCH 1/3] x86/mm/pat: Disable preemption around __flush_tlb_all() Sebastian Andrzej Siewior
2018-10-16 21:25   ` Andy Lutomirski
2018-10-16 21:38     ` Sebastian Andrzej Siewior
2018-10-16 23:28       ` Andy Lutomirski
2018-10-17 10:34         ` [PATCH 1/3 v2] " Sebastian Andrzej Siewior
2018-10-29 18:10           ` [tip:x86/urgent] " tip-bot for Sebastian Andrzej Siewior
2018-11-05 21:56             ` Dan Williams
2018-10-17  9:54   ` [PATCH 1/3] " David Laight
2018-10-17 10:39     ` 'Sebastian Andrzej Siewior'
2018-10-17 11:45       ` David Laight
2018-10-17 12:00         ` 'Sebastian Andrzej Siewior'
2018-10-17 11:11     ` Peter Zijlstra
2018-10-17 11:17       ` Thomas Gleixner
2018-10-17 15:47         ` Peter Zijlstra
2018-10-17 15:55           ` Thomas Gleixner
2018-10-17 16:00           ` 'Sebastian Andrzej Siewior'
2018-10-17 16:22             ` Peter Zijlstra
2018-10-16 20:25 ` [PATCH 2/3] x86/fpu: Remove second definition of fpu in __fpu__restore_sig() Sebastian Andrzej Siewior
2018-10-16 21:26   ` Andy Lutomirski
2018-10-17  9:09   ` [tip:x86/urgent] " tip-bot for Sebastian Andrzej Siewior
2018-10-18  6:22   ` tip-bot for Sebastian Andrzej Siewior
2018-10-16 20:25 ` Sebastian Andrzej Siewior [this message]
2018-10-16 23:00   ` [PATCH 3/3] x86/fpu: Save FPU registers on context switch if there is a FPU Andy Lutomirski
2018-10-17  9:10   ` [tip:x86/urgent] x86/fpu: Fix i486 + no387 boot crash by only saving FPU registers on context switch if there is an FPU tip-bot for Sebastian Andrzej Siewior
2018-10-18  6:22   ` tip-bot for Sebastian Andrzej Siewior

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