* [PATCH 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API
2018-10-20 8:36 [PATCH 0/3] Add nvmem driver support for ZynqMP Nava kishore Manne
@ 2018-10-20 8:36 ` Nava kishore Manne
2018-10-20 8:36 ` [PATCH 2/3] dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver Nava kishore Manne
2018-10-20 8:36 ` [PATCH 3/3] nvmem: zynqmp: Added zynqmp nvmem firmware driver Nava kishore Manne
2 siblings, 0 replies; 5+ messages in thread
From: Nava kishore Manne @ 2018-10-20 8:36 UTC (permalink / raw)
To: srinivas.kandagatla, robh+dt, mark.rutland, michal.simek, jollys,
rajanv, nava.manne, devicetree, linux-arm-kernel, linux-kernel
This patch adds a new API to provide access to the
hardware related data like soc revision, IDCODE... etc.
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v1:
-None.
Changes for RFC-V3:
-corrected typo error in commit msg.
Changes for RFC-v2:
-New Patch.
drivers/firmware/xilinx/zynqmp.c | 24 ++++++++++++++++++++++++
include/linux/firmware/xlnx-zynqmp.h | 2 ++
2 files changed, 26 insertions(+)
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
index 84b3fd2..e76c889 100644
--- a/drivers/firmware/xilinx/zynqmp.c
+++ b/drivers/firmware/xilinx/zynqmp.c
@@ -187,6 +187,29 @@ static int zynqmp_pm_get_api_version(u32 *version)
}
/**
+ * zynqmp_pm_get_chipid - Get silicon ID registers
+ * @idcode: IDCODE register
+ * @version: version register
+ *
+ * Return: Returns the status of the operation and the idcode and version
+ * registers in @idcode and @version.
+ */
+static int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
+{
+ u32 ret_payload[PAYLOAD_ARG_CNT];
+ int ret;
+
+ if (!idcode || !version)
+ return -EINVAL;
+
+ ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
+ *idcode = ret_payload[1];
+ *version = ret_payload[2];
+
+ return ret;
+}
+
+/**
* zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
* @version: Returned version value
*
@@ -430,6 +453,7 @@ static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
static const struct zynqmp_eemi_ops eemi_ops = {
.get_api_version = zynqmp_pm_get_api_version,
+ .get_chipid = zynqmp_pm_get_chipid,
.query_data = zynqmp_pm_query_data,
.clock_enable = zynqmp_pm_clock_enable,
.clock_disable = zynqmp_pm_clock_disable,
diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
index 015e130..1d3126d 100644
--- a/include/linux/firmware/xlnx-zynqmp.h
+++ b/include/linux/firmware/xlnx-zynqmp.h
@@ -34,6 +34,7 @@
enum pm_api_id {
PM_GET_API_VERSION = 1,
+ PM_GET_CHIPID = 22,
PM_QUERY_DATA = 35,
PM_CLOCK_ENABLE,
PM_CLOCK_DISABLE,
@@ -89,6 +90,7 @@ struct zynqmp_pm_query_data {
struct zynqmp_eemi_ops {
int (*get_api_version)(u32 *version);
+ int (*get_chipid)(u32 *idcode, u32 *version);
int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out);
int (*clock_enable)(u32 clock_id);
int (*clock_disable)(u32 clock_id);
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/3] dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver
2018-10-20 8:36 [PATCH 0/3] Add nvmem driver support for ZynqMP Nava kishore Manne
2018-10-20 8:36 ` [PATCH 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API Nava kishore Manne
@ 2018-10-20 8:36 ` Nava kishore Manne
2018-10-25 19:15 ` Rob Herring
2018-10-20 8:36 ` [PATCH 3/3] nvmem: zynqmp: Added zynqmp nvmem firmware driver Nava kishore Manne
2 siblings, 1 reply; 5+ messages in thread
From: Nava kishore Manne @ 2018-10-20 8:36 UTC (permalink / raw)
To: srinivas.kandagatla, robh+dt, mark.rutland, michal.simek, jollys,
rajanv, nava.manne, devicetree, linux-arm-kernel, linux-kernel
Add documentation to describe Xilinx ZynqMP nvmem driver
bindings.
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v1:
Created a Seperate(New) DT binding file as
suggested by Rob.
Changes for RFC-V3:
-None.
Changes for RFC-V2:
-Moved nvmem_firmware node as a child to
firwmare node.
.../bindings/nvmem/xlnx,zynqmp-nvmem.txt | 37 ++++++++++++++++++++++
1 file changed, 37 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
diff --git a/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt b/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
new file mode 100644
index 0000000..0bafb9f
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
@@ -0,0 +1,37 @@
+--------------------------------------------------------------------------
+= Zynq UltraScale+ MPSoC nvmem firmware driver binding =
+--------------------------------------------------------------------------
+The nvmem_firmware node provides access to the hardware related data
+like soc revision, IDCODE... etc, By using the firmware interface.
+
+Required properties:
+- compatible: should be "xlnx,zynqmp-nvmem-fw"
+
+= Data cells =
+Are child nodes of silicon id, bindings of which as described in
+bindings/nvmem/nvmem.txt
+
+-------
+ Example
+-------
+ nvmem_firmware {
+ compatible = "xlnx,zynqmp-nvmem-fw";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* Data cells */
+ soc_revision: soc_revision {
+ reg = <0x0 0x4>;
+ };
+ };
+
+= Data consumers =
+Are device nodes which consume nvmem data cells.
+
+For example:
+ pcap {
+ ...
+ nvmem-cells = <&soc_revision>;
+ nvmem-cell-names = "soc_revision";
+ };
+
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 2/3] dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver
2018-10-20 8:36 ` [PATCH 2/3] dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver Nava kishore Manne
@ 2018-10-25 19:15 ` Rob Herring
0 siblings, 0 replies; 5+ messages in thread
From: Rob Herring @ 2018-10-25 19:15 UTC (permalink / raw)
To: Nava kishore Manne
Cc: srinivas.kandagatla, mark.rutland, michal.simek, jollys, rajanv,
devicetree, linux-arm-kernel, linux-kernel
On Sat, Oct 20, 2018 at 02:06:02PM +0530, Nava kishore Manne wrote:
> Add documentation to describe Xilinx ZynqMP nvmem driver
> bindings.
>
> Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
> ---
> Changes for v1:
> Created a Seperate(New) DT binding file as
> suggested by Rob.
>
> Changes for RFC-V3:
> -None.
>
> Changes for RFC-V2:
> -Moved nvmem_firmware node as a child to
> firwmare node.
>
> .../bindings/nvmem/xlnx,zynqmp-nvmem.txt | 37 ++++++++++++++++++++++
> 1 file changed, 37 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/nvmem/xlnx,zynqmp-nvmem.txt
Before I okay any ZynqMP firmware related bindings, I want to see a
complete binding, not things added one by one.
Rob
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 3/3] nvmem: zynqmp: Added zynqmp nvmem firmware driver
2018-10-20 8:36 [PATCH 0/3] Add nvmem driver support for ZynqMP Nava kishore Manne
2018-10-20 8:36 ` [PATCH 1/3] firmware: xilinx: Add zynqmp_pm_get_chipid() API Nava kishore Manne
2018-10-20 8:36 ` [PATCH 2/3] dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver Nava kishore Manne
@ 2018-10-20 8:36 ` Nava kishore Manne
2 siblings, 0 replies; 5+ messages in thread
From: Nava kishore Manne @ 2018-10-20 8:36 UTC (permalink / raw)
To: srinivas.kandagatla, robh+dt, mark.rutland, michal.simek, jollys,
rajanv, nava.manne, devicetree, linux-arm-kernel, linux-kernel
This patch adds zynqmp nvmem firmware driver to access the
SoC revision information from the hardware register.
Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
---
Changes for v1:
-None
Changes for RFC-V3:
-Changed nvmem_register() to devm_nvmem_register()
and pr_debug() to dev_dbg() as suggested by srinivas.
Changes for RFC-V2:
-None.
drivers/nvmem/Kconfig | 15 ++++----
drivers/nvmem/Makefile | 5 +--
drivers/nvmem/zynqmp_nvmem.c | 86 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 96 insertions(+), 10 deletions(-)
create mode 100644 drivers/nvmem/zynqmp_nvmem.c
diff --git a/drivers/nvmem/Kconfig b/drivers/nvmem/Kconfig
index 0a7a470e..2edb142 100644
--- a/drivers/nvmem/Kconfig
+++ b/drivers/nvmem/Kconfig
@@ -181,15 +181,14 @@ config RAVE_SP_EEPROM
help
Say y here to enable Rave SP EEPROM support.
-config SC27XX_EFUSE
- tristate "Spreadtrum SC27XX eFuse Support"
- depends on MFD_SC27XX_PMIC || COMPILE_TEST
- depends on HAS_IOMEM
+config NVMEM_ZYNQMP
+ bool "Xilinx ZYNQMP SoC nvmem firmware support"
+ depends on ARCH_ZYNQMP
help
- This is a simple driver to dump specified values of Spreadtrum
- SC27XX PMICs from eFuse.
+ This is a driver to access hardware related data like
+ soc revision, IDCODE... etc by using the firmware
+ interface.
- This driver can also be built as a module. If so, the module
- will be called nvmem-sc27xx-efuse.
+ If sure, say yes. If unsure, say no.
endif
diff --git a/drivers/nvmem/Makefile b/drivers/nvmem/Makefile
index 4e8c616..0b3abd7 100644
--- a/drivers/nvmem/Makefile
+++ b/drivers/nvmem/Makefile
@@ -39,5 +39,6 @@ obj-$(CONFIG_NVMEM_SNVS_LPGPR) += nvmem_snvs_lpgpr.o
nvmem_snvs_lpgpr-y := snvs_lpgpr.o
obj-$(CONFIG_RAVE_SP_EEPROM) += nvmem-rave-sp-eeprom.o
nvmem-rave-sp-eeprom-y := rave-sp-eeprom.o
-obj-$(CONFIG_SC27XX_EFUSE) += nvmem-sc27xx-efuse.o
-nvmem-sc27xx-efuse-y := sc27xx-efuse.o
+obj-$(CONFIG_NVMEM_ZYNQMP) += nvmem_zynqmp_nvmem.o
+nvmem_zynqmp_nvmem-y := zynqmp_nvmem.o
+
diff --git a/drivers/nvmem/zynqmp_nvmem.c b/drivers/nvmem/zynqmp_nvmem.c
new file mode 100644
index 0000000..b910864
--- /dev/null
+++ b/drivers/nvmem/zynqmp_nvmem.c
@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2018 Xilinx, Inc.
+ */
+
+#include <linux/module.h>
+#include <linux/nvmem-provider.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/firmware/xlnx-zynqmp.h>
+
+#define SILICON_REVISION_MASK 0xF
+
+struct zynqmp_nvmem_data {
+ struct device *dev;
+ struct nvmem_device *nvmem;
+};
+
+static int zynqmp_nvmem_read(void *context, unsigned int offset,
+ void *val, size_t bytes)
+{
+ int ret;
+ int idcode, version;
+ struct zynqmp_nvmem_data *priv = context;
+
+ const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
+
+ if (!eemi_ops || !eemi_ops->get_chipid)
+ return -ENXIO;
+
+ ret = eemi_ops->get_chipid(&idcode, &version);
+ if (ret < 0)
+ return ret;
+
+ dev_dbg(priv->dev, "Read chipid val %x %x\n", idcode, version);
+ *(int *)val = version & SILICON_REVISION_MASK;
+
+ return 0;
+}
+
+static struct nvmem_config econfig = {
+ .name = "zynqmp-nvmem",
+ .owner = THIS_MODULE,
+ .word_size = 1,
+ .size = 1,
+ .read_only = true,
+};
+
+static const struct of_device_id zynqmp_nvmem_match[] = {
+ { .compatible = "xlnx,zynqmp-nvmem-fw", },
+ { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, zynqmp_nvmem_match);
+
+static int zynqmp_nvmem_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct zynqmp_nvmem_data *priv;
+
+ priv = devm_kzalloc(dev, sizeof(struct zynqmp_nvmem_data), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->dev = dev;
+ econfig.dev = dev;
+ econfig.reg_read = zynqmp_nvmem_read;
+ econfig.priv = priv;
+
+ priv->nvmem = devm_nvmem_register(dev, &econfig);
+
+ return PTR_ERR_OR_ZERO(priv->nvmem);
+}
+
+static struct platform_driver zynqmp_nvmem_driver = {
+ .probe = zynqmp_nvmem_probe,
+ .driver = {
+ .name = "zynqmp-nvmem",
+ .of_match_table = zynqmp_nvmem_match,
+ },
+};
+
+module_platform_driver(zynqmp_nvmem_driver);
+
+MODULE_AUTHOR("Michal Simek <michal.simek@xilinx.com>, Nava kishore Manne <navam@xilinx.com>");
+MODULE_DESCRIPTION("ZynqMP NVMEM driver");
+MODULE_LICENSE("GPL");
--
2.7.4
^ permalink raw reply related [flat|nested] 5+ messages in thread