From: Maxime Ripard <maxime.ripard@bootlin.com> To: Jagan Teki <jagan@amarulasolutions.com> Cc: Chen-Yu Tsai <wens@csie.org>, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH] arm64: dts: allwinner: a64: Add device node for Mali-400 GPU Date: Wed, 24 Oct 2018 18:07:09 +0100 [thread overview] Message-ID: <20181024170709.m4s4x3o6qfr4mdbs@flea> (raw) In-Reply-To: <20181023161203.2956-1-jagan@amarulasolutions.com> On Tue, Oct 23, 2018 at 09:42:03PM +0530, Jagan Teki wrote: > Add support for Allwinner A64 has Mali-400MP2. > > All interrupt lines are mentioned in the manual so used the same. > Used 408MHz as assigned clock rate used by BSP, so used the same as > well. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > Note: > - Modules was able to load it on 4.19. > > .../bindings/gpu/arm,mali-utgard.txt | 1 + > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 25 +++++++++++++++++++ > 2 files changed, 26 insertions(+) > > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt > index 63cd91176a68..a0ee62a5b221 100644 > --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt > @@ -11,6 +11,7 @@ Required properties: > + allwinner,sun4i-a10-mali > + allwinner,sun7i-a20-mali > + allwinner,sun8i-h3-mali > + + allwinner,sun50i-a64-mali > + allwinner,sun50i-h5-mali > + amlogic,meson-gxbb-mali > + amlogic,meson-gxl-mali Please make a separate patch for this change. > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index f82e6b165d57..2db3aa151902 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -812,6 +812,31 @@ > }; > }; > > + mali: gpu@1c40000 { > + compatible = "allwinner,sun50i-a64-mali", "arm,mali-400"; > + reg = <0x01c40000 0x10000>; > + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "gp", > + "gpmmu", > + "pp0", > + "ppmmu0", > + "pp1", > + "ppmmu1", > + "pmu"; > + clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; > + clock-names = "bus", "core"; > + resets = <&ccu RST_BUS_GPU>; > + > + assigned-clocks = <&ccu CLK_GPU>; > + assigned-clock-rates = <408000000>; This is not needed and should be done in the driver. Thanks! Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
prev parent reply other threads:[~2018-10-24 17:07 UTC|newest] Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-10-23 16:12 Jagan Teki 2018-10-24 17:07 ` Maxime Ripard [this message]
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