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From: Moritz Fischer <>
To: Andreas Puhm <>
Cc: ""
	Moritz Fischer <>,
	Anatolij Gustschin <>, Alan Tull <>,
	"" <>,
	"" <>
Subject: Re: [PATCH] fpga: altera_cvp: restrict registration to CvP enabled devices
Date: Sun, 28 Oct 2018 10:35:03 -0700	[thread overview]
Message-ID: <20181028173503.GA4358@archbook> (raw)
In-Reply-To: <>

Hi Andreas,

On Thu, Oct 25, 2018 at 08:44:06AM +0000, Andreas Puhm wrote:

> >My experience with cvp is with Arria10 and Stratix 10.  The PCIe Hard IP
> >gets configured when the IOring gets configured at power on.  The idea is
> >that the load of the IOring is very fast, much before the infamous 100ms
> >PCIe timeout for link training.  When the Hard IP is configured, the
> >CVP_EN is set or cleared according to how it was configured.  Yes, you
> So is it correct that the value of CVP_EN can be evaluated by the altera_cvp right in the first call of its probe function
> (as would be the case with my proposed patch).
> If it is, I will fix the remaining issues with the patch and submit it.

Yes please, go ahead and fix up the remaining issues (+ send it using
git send-email)


      reply	other threads:[~2018-10-28 17:35 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-22 13:15 [PATCH] fpga: altera_cvp: restrict registration to CvP enabled devices Andreas Puhm
2018-10-22 13:34 ` Eric Schwarz
2018-10-22 14:04 ` Moritz Fischer
2018-10-23 16:26 ` Anatolij Gustschin
2018-10-23 18:46   ` AW: " Andreas Puhm
2018-10-24  9:51     ` Moritz Fischer
2018-10-24 23:00       ` matthew.gerlach
2018-10-25  8:44         ` AW: " Andreas Puhm
2018-10-28 17:35           ` Moritz Fischer [this message]

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