From: Lu Baolu <baolu.lu@linux.intel.com>
To: Joerg Roedel <joro@8bytes.org>,
David Woodhouse <dwmw2@infradead.org>,
Alex Williamson <alex.williamson@redhat.com>,
Kirti Wankhede <kwankhede@nvidia.com>
Cc: ashok.raj@intel.com, sanjay.k.kumar@intel.com,
jacob.jun.pan@intel.com, kevin.tian@intel.com,
Jean-Philippe Brucker <jean-philippe.brucker@arm.com>,
yi.l.liu@intel.com, yi.y.sun@intel.com, peterx@redhat.com,
tiwei.bie@intel.com, Zeng Xin <xin.zeng@intel.com>,
iommu@lists.linux-foundation.org, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, Lu Baolu <baolu.lu@linux.intel.com>,
Jacob Pan <jacob.jun.pan@linux.intel.com>
Subject: [PATCH v4 3/8] iommu/vt-d: Enable/disable multiple domains per device
Date: Mon, 5 Nov 2018 15:34:03 +0800 [thread overview]
Message-ID: <20181105073408.21815-4-baolu.lu@linux.intel.com> (raw)
In-Reply-To: <20181105073408.21815-1-baolu.lu@linux.intel.com>
Add iommu ops for enabling and disabling multiple domains per
device.
Cc: Ashok Raj <ashok.raj@intel.com>
Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Liu Yi L <yi.l.liu@intel.com>
---
drivers/iommu/intel-iommu.c | 65 ++++++++++++++++++++++++++++++++++++-
include/linux/intel-iommu.h | 1 +
2 files changed, 65 insertions(+), 1 deletion(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index 298f7a3fafe8..2c86ac71c774 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -2476,6 +2476,7 @@ static struct dmar_domain *dmar_insert_one_dev_info(struct intel_iommu *iommu,
info->domain = domain;
info->iommu = iommu;
info->pasid_table = NULL;
+ info->auxd_enabled = 0;
if (dev && dev_is_pci(dev)) {
struct pci_dev *pdev = to_pci_dev(info->dev);
@@ -5353,13 +5354,74 @@ static int intel_iommu_get_dev_attr(struct device *dev,
enum iommu_dev_attr attr, void *data)
{
int ret = 0;
- bool *auxd_capable;
+ struct device_domain_info *info;
+ bool *auxd_capable, *auxd_enabled;
switch (attr) {
case IOMMU_DEV_ATTR_AUXD_CAPABILITY:
auxd_capable = data;
*auxd_capable = scalable_mode_support();
break;
+ case IOMMU_DEV_ATTR_AUXD_ENABLED:
+ auxd_enabled = data;
+ info = dev->archdata.iommu;
+ *auxd_enabled = info && info->auxd_enabled;
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ return ret;
+}
+
+static int intel_iommu_enable_auxd(struct device *dev)
+{
+ struct device_domain_info *info;
+ struct dmar_domain *domain;
+ unsigned long flags;
+
+ if (!scalable_mode_support())
+ return -ENODEV;
+
+ domain = get_valid_domain_for_dev(dev);
+ if (!domain)
+ return -ENODEV;
+
+ spin_lock_irqsave(&device_domain_lock, flags);
+ info = dev->archdata.iommu;
+ info->auxd_enabled = 1;
+ spin_unlock_irqrestore(&device_domain_lock, flags);
+
+ return 0;
+}
+
+static int intel_iommu_disable_auxd(struct device *dev)
+{
+ struct device_domain_info *info;
+ unsigned long flags;
+
+ spin_lock_irqsave(&device_domain_lock, flags);
+ info = dev->archdata.iommu;
+ if (!WARN_ON(!info))
+ info->auxd_enabled = 0;
+ spin_unlock_irqrestore(&device_domain_lock, flags);
+
+ return 0;
+}
+
+static int intel_iommu_set_dev_attr(struct device *dev,
+ enum iommu_dev_attr attr, void *data)
+{
+ int ret = 0;
+
+ switch (attr) {
+ case IOMMU_DEV_ATTR_AUXD_ENABLE:
+ ret = intel_iommu_enable_auxd(dev);
+ break;
+ case IOMMU_DEV_ATTR_AUXD_DISABLE:
+ ret = intel_iommu_disable_auxd(dev);
+ break;
default:
ret = -EINVAL;
break;
@@ -5383,6 +5445,7 @@ const struct iommu_ops intel_iommu_ops = {
.put_resv_regions = intel_iommu_put_resv_regions,
.device_group = pci_device_group,
.get_dev_attr = intel_iommu_get_dev_attr,
+ .set_dev_attr = intel_iommu_set_dev_attr,
.pgsize_bitmap = INTEL_IOMMU_PGSIZES,
};
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index d174724e131f..6b198e13e75e 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -552,6 +552,7 @@ struct device_domain_info {
u8 pri_enabled:1;
u8 ats_supported:1;
u8 ats_enabled:1;
+ u8 auxd_enabled:1; /* Multiple domains per device */
u8 ats_qdep;
struct device *dev; /* it's NULL for PCIe-to-PCI bridge */
struct intel_iommu *iommu; /* IOMMU used by this device */
--
2.17.1
next prev parent reply other threads:[~2018-11-05 7:37 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-05 7:34 [PATCH v4 0/8] vfio/mdev: IOMMU aware mediated device Lu Baolu
2018-11-05 7:34 ` [PATCH v4 1/8] iommu: Add APIs for multiple domains per device Lu Baolu
2018-11-23 10:50 ` Auger Eric
2018-11-26 2:04 ` Lu Baolu
2018-11-05 7:34 ` [PATCH v4 2/8] iommu/vt-d: Add multiple domains per device query Lu Baolu
2018-11-23 10:49 ` Auger Eric
2018-11-26 2:10 ` Lu Baolu
2018-11-05 7:34 ` Lu Baolu [this message]
2018-11-05 7:34 ` [PATCH v4 4/8] iommu/vt-d: Attach/detach domains in auxiliary mode Lu Baolu
2018-11-23 10:49 ` Auger Eric
2018-11-26 2:37 ` Lu Baolu
2018-11-05 7:34 ` [PATCH v4 5/8] iommu/vt-d: Return ID associated with an auxiliary domain Lu Baolu
2018-11-05 7:34 ` [PATCH v4 6/8] vfio/mdev: Add iommu place holders in mdev_device Lu Baolu
2018-11-05 14:51 ` Christoph Hellwig
2018-11-05 23:33 ` Lu Baolu
2018-11-06 23:53 ` Alex Williamson
2018-11-07 1:48 ` Lu Baolu
2018-11-15 21:31 ` Kirti Wankhede
2018-11-16 1:20 ` Lu Baolu
2018-11-16 8:57 ` Christoph Hellwig
2018-11-17 2:37 ` Lu Baolu
2018-11-20 20:52 ` Kirti Wankhede
2018-11-21 8:45 ` Christoph Hellwig
2018-12-03 16:27 ` Kirti Wankhede
2018-11-05 7:34 ` [PATCH v4 7/8] vfio/type1: Add domain at(de)taching group helpers Lu Baolu
2018-11-23 14:13 ` Auger Eric
2018-11-26 3:05 ` Lu Baolu
2018-11-05 7:34 ` [PATCH v4 8/8] vfio/type1: Handle different mdev isolation type Lu Baolu
2018-11-23 14:23 ` Auger Eric
2018-11-26 3:09 ` Lu Baolu
2018-12-04 3:46 ` [PATCH v4 0/8] vfio/mdev: IOMMU aware mediated device Xu Zaibo
2018-12-04 6:20 ` Lu Baolu
2018-12-04 6:50 ` Xu Zaibo
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