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Tue, 6 Nov 2018 15:41:22 +0000 Received: from DM5PR12MB2471.namprd12.prod.outlook.com ([fe80::4c23:f551:bc6a:554e]) by DM5PR12MB2471.namprd12.prod.outlook.com ([fe80::4c23:f551:bc6a:554e%4]) with mapi id 15.20.1294.032; Tue, 6 Nov 2018 15:41:22 +0000 From: "Moger, Babu" To: "tglx@linutronix.de" , "mingo@redhat.com" , "bp@alien8.de" , "corbet@lwn.net" , "fenghua.yu@intel.com" , "reinette.chatre@intel.com" , "peterz@infradead.org" , "gregkh@linuxfoundation.org" , "davem@davemloft.net" , "akpm@linux-foundation.org" CC: "hpa@zytor.com" , "x86@kernel.org" , "mchehab+samsung@kernel.org" , "arnd@arndb.de" , "kstewart@linuxfoundation.org" , "pombredanne@nexb.com" , "rafael@kernel.org" , "kirill.shutemov@linux.intel.com" , "tony.luck@intel.com" , "qianyue.zj@alibaba-inc.com" , "xiaochen.shen@intel.com" , "pbonzini@redhat.com" , "Singh, Brijesh" , "Hurwitz, Sherry" , "dwmw2@infradead.org" , "Lendacky, Thomas" , "luto@kernel.org" , "joro@8bytes.org" , "jannh@google.com" , "vkuznets@redhat.com" , "rian@alum.mit.edu" , "jpoimboe@redhat.com" , "Moger, Babu" , "linux-kernel@vger.kernel.org" , "linux-doc@vger.kernel.org" Subject: [PATCH v6 11/14] arch/x86: Add AMD feature bit X86_FEATURE_MBA in cpuid bits array Thread-Topic: [PATCH v6 11/14] arch/x86: Add AMD feature bit X86_FEATURE_MBA in cpuid bits array Thread-Index: AQHUdecq3QUa4GzIN0iDENh8g8615w== Date: Tue, 6 Nov 2018 15:41:21 +0000 Message-ID: <20181106154034.15386-12-babu.moger@amd.com> References: <20181106154034.15386-1-babu.moger@amd.com> In-Reply-To: <20181106154034.15386-1-babu.moger@amd.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: SN4PR0401CA0010.namprd04.prod.outlook.com (2603:10b6:803:21::20) To DM5PR12MB2471.namprd12.prod.outlook.com (2603:10b6:4:b5::10) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Babu.Moger@amd.com; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 393ae6aa-5f56-47ac-2f62-08d643fe4d3d X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 15:41:21.9285 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1801 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sherry Hurwitz The feature bit X86_FEATURE_MBA is detected via CPUID leaf 0x80000008 EBX Bit 06. This bit indicates the support of AMD's MBA feature. This feature is supported by both Intel and AMD. But they are detected in different CPUID leaves. Signed-off-by: Sherry Hurwitz Signed-off-by: Babu Moger Reviewed-by: Borislav Petkov --- arch/x86/kernel/cpu/scattered.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattere= d.c index 772c219b6889..bd7853334b27 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -17,7 +17,11 @@ struct cpuid_bit { u32 sub_leaf; }; =20 -/* Please keep the leaf sorted by cpuid_bit.level for faster search. */ +/* + * Please keep the leaf sorted by cpuid_bit.level for faster search. + * X86_FEATURE_MBA supported by both Intel and AMD. But the cpuid + * levels are different. Add a separate enty for each. + */ static const struct cpuid_bit cpuid_bits[] =3D { { X86_FEATURE_APERFMPERF, CPUID_ECX, 0, 0x00000006, 0 }, { X86_FEATURE_EPB, CPUID_ECX, 3, 0x00000006, 0 }, @@ -29,6 +33,7 @@ static const struct cpuid_bit cpuid_bits[] =3D { { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, + { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, { X86_FEATURE_SME, CPUID_EAX, 0, 0x8000001f, 0 }, { X86_FEATURE_SEV, CPUID_EAX, 1, 0x8000001f, 0 }, { 0, 0, 0, 0, 0 } --=20 2.17.1