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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: gkDgyoh3sW49/N+ZQTqnIXlkrIhCQPnqtdXLTp3gXZHK1ziS7bN/W9c2s8bE33e4sdeTP5UF/rrkvEIm4GMLzPNXaf9QsC9fb88X/2/izOVGuYmLwPCjmiMNaQMxhXsieO5jrLb4bysFLSCC3LTnu9Wc8TOWDqNPsYbg5yN4oPyYridE6bj6v6JviVe4s3nueHIA3bykwSAGdzi6kZyQd+VucUfjbOMIcRNRlrYRnDcdMgwEYA6i5sCnMRaSVMB5K0Ypew8QiY/ad95jvZPiGLZA+hROQOAUqFm2ViO2jyLslf2OCrucwDrGxQ3GQD9rFx/lIW2dT3oj5y+LNuZls2cCPs7a8xksbyQ/76BSjF4= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8df833e4-55c8-4b19-0419-08d645d42f65 X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Nov 2018 23:44:55.9784 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1757 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Select CONFIG_CPU_NO_EFFICIENT_FFS via Kconfig when the kernel is configured for a pre-MIPS32r1 CPU, rather than defining its equivalent in asm/cpu-features.h based upon overrides of cpu_has_mips* macros. The latter only works if a platform has an cpu-feature-overrides.h header which defines cpu_has_mips* macros, which are not generally needed. There are many cases where we know that the target ISA for a kernel build is MIPS32r1 or later & thus includes the CLZ instruction, without requiring any overrides from the platform. Using Kconfig allows us to take those into account, and more naturally make a decision about instruction support using information about the target ISA. Signed-off-by: Paul Burton Cc: Andrew Morton Cc: Zhaoxiu Zeng --- arch/mips/Kconfig | 13 ++++++++++++- arch/mips/include/asm/cpu-features.h | 10 ---------- 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 71aaa5bcd805..6696eadf7267 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -15,6 +15,7 @@ config MIPS select ARCH_WANT_IPC_PARSE_VERSION select BUILDTIME_EXTABLE_SORT select CLONE_BACKWARDS + select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) select CPU_PM if CPU_IDLE select DMA_DIRECT_OPS select GENERIC_ATOMIC64 if !64BIT @@ -2032,7 +2033,7 @@ config CPU_MIPS64 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6 =20 # -# These two indicate the revision of the architecture, either Release 1 or= Release 2 +# These indicate the revision of the architecture # config CPU_MIPSR1 bool @@ -2053,6 +2054,16 @@ config CPU_MIPSR6 select MIPS_CRC_SUPPORT select MIPS_SPRAM =20 +config TARGET_ISA_REV + int + default 1 if CPU_MIPSR1 + default 2 if CPU_MIPSR2 + default 6 if CPU_MIPSR6 + default 0 + help + Reflects the ISA revision being targeted by the kernel build. This + is effectively the Kconfig equivalent of MIPS_ISA_REV. + config EVA bool =20 diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/c= pu-features.h index 1f3f7453c1d2..83a27af8ada6 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -261,16 +261,6 @@ #endif #endif =20 -/* __builtin_constant_p(cpu_has_mips_r) && cpu_has_mips_r */ -#if !((defined(cpu_has_mips32r1) && cpu_has_mips32r1) || \ - (defined(cpu_has_mips32r2) && cpu_has_mips32r2) || \ - (defined(cpu_has_mips32r6) && cpu_has_mips32r6) || \ - (defined(cpu_has_mips64r1) && cpu_has_mips64r1) || \ - (defined(cpu_has_mips64r2) && cpu_has_mips64r2) || \ - (defined(cpu_has_mips64r6) && cpu_has_mips64r6)) -#define CPU_NO_EFFICIENT_FFS 1 -#endif - #ifndef cpu_has_mips_1 # define cpu_has_mips_1 (MIPS_ISA_REV < 6) #endif --=20 2.19.1