From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2D5F1C43441 for ; Tue, 13 Nov 2018 11:24:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D9A492250E for ; Tue, 13 Nov 2018 11:24:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="CIXe/hKF" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D9A492250E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732620AbeKMVWb (ORCPT ); Tue, 13 Nov 2018 16:22:31 -0500 Received: from mail.kernel.org ([198.145.29.99]:53236 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732402AbeKMVWa (ORCPT ); Tue, 13 Nov 2018 16:22:30 -0500 Received: from localhost (unknown [64.114.255.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6D44022419; Tue, 13 Nov 2018 11:24:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1542108289; bh=G053dpENDY3PVcVKnJsfkfwaE6JeNMXJv8MG3AQr0Lo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=CIXe/hKFoUkHk8ML/EFhBioryg7GyKTvL+AqsuGHyBPrsvrQEPPzwyiRMiGgMYyMC RpX4Njkh5vkpQ2Y6u8kheYi/gbWLGPP/csxEPad3GdENLrbhnsLmuw1dATCrecj8SR mhhSFkm40+20pEy2iP1TimFSJ0MjJyQNDWABC04g= Date: Tue, 13 Nov 2018 13:24:46 +0200 From: Leon Romanovsky To: Salil Mehta Cc: davem@davemloft.net, yisen.zhuang@huawei.com, lipeng321@huawei.com, mehta.salil@opnsrc.net, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rdma@vger.kernel.org, linuxarm@huawei.com Subject: Re: [PATCH net-next 1/5] net: hns3: Enable HW GRO for Rev B(=0x21) HNS3 hardware Message-ID: <20181113112446.GC3759@mtr-leonro.mtl.com> References: <20181113101307.6020-1-salil.mehta@huawei.com> <20181113101307.6020-2-salil.mehta@huawei.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="17pEHd4RhPHOinZp" Content-Disposition: inline In-Reply-To: <20181113101307.6020-2-salil.mehta@huawei.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --17pEHd4RhPHOinZp Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Nov 13, 2018 at 10:13:03AM +0000, Salil Mehta wrote: > From: Peng Li > > HNS3 hardware Revision B(=0x21) supports Hardware GRO feature. This > patch enables this feature in the HNS3 PF/VF driver. > > Signed-off-by: Peng Li > Signed-off-by: Salil Mehta > --- > drivers/net/ethernet/hisilicon/hns3/hnae3.h | 4 ++ > .../net/ethernet/hisilicon/hns3/hns3_enet.c | 4 +- > .../hisilicon/hns3/hns3pf/hclge_cmd.h | 7 ++++ > .../hisilicon/hns3/hns3pf/hclge_main.c | 36 ++++++++++++++++++ > .../hisilicon/hns3/hns3vf/hclgevf_cmd.h | 8 ++++ > .../hisilicon/hns3/hns3vf/hclgevf_main.c | 37 +++++++++++++++++++ > 6 files changed, 95 insertions(+), 1 deletion(-) > > diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h > index f69d39f17bdd..21d934b7a2a3 100644 > --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h > +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h > @@ -52,6 +52,7 @@ > #define HNAE3_UNIC_CLIENT_INITED_B 0x4 > #define HNAE3_ROCE_CLIENT_INITED_B 0x5 > #define HNAE3_DEV_SUPPORT_FD_B 0x6 > +#define HNAE3_DEV_SUPPORT_GRO_B 0x7 > > #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\ > BIT(HNAE3_DEV_SUPPORT_ROCE_B)) > @@ -65,6 +66,9 @@ > #define hnae3_dev_fd_supported(hdev) \ > hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B) > > +#define hnae3_dev_gro_supported(hdev) \ > + hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B) > + > #define ring_ptr_move_fw(ring, p) \ > ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) > #define ring_ptr_move_bw(ring, p) \ > diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c > index 8d07ec668d5d..a510ddfd45a5 100644 > --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c > +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c > @@ -1714,8 +1714,10 @@ static void hns3_disable_sriov(struct pci_dev *pdev) > static void hns3_get_dev_capability(struct pci_dev *pdev, > struct hnae3_ae_dev *ae_dev) > { > - if (pdev->revision >= 0x21) > + if (pdev->revision >= 0x21) { > hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B, 1); > + hnae3_set_bit(ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B, 1); > + } > } > > /* hns3_probe - Device initialization routine > diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h > index 872cd4bdd70d..aef044d08b11 100644 > --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h > +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h > @@ -152,6 +152,7 @@ enum hclge_opcode_type { > > /* TSO command */ > HCLGE_OPC_TSO_GENERIC_CONFIG = 0x0C01, > + HCLGE_OPC_GRO_GENERIC_CONFIG = 0x0C10, > > /* RSS commands */ > HCLGE_OPC_RSS_GENERIC_CONFIG = 0x0D01, > @@ -758,6 +759,12 @@ struct hclge_cfg_tso_status_cmd { > u8 rsv[20]; > }; > > +#define HCLGE_GRO_EN_B 0 > +struct hclge_cfg_gro_status_cmd { > + __le16 gro_en; > + u8 rsv[22]; > +}; > + > #define HCLGE_TSO_MSS_MIN 256 > #define HCLGE_TSO_MSS_MAX 9668 > > diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c > index 43bfc730a62d..d02712446d50 100644 > --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c > +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c > @@ -921,6 +921,28 @@ static int hclge_config_tso(struct hclge_dev *hdev, int tso_mss_min, > return hclge_cmd_send(&hdev->hw, &desc, 1); > } > > +static int hclge_config_gro(struct hclge_dev *hdev, bool en) > +{ > + struct hclge_cfg_gro_status_cmd *req; > + struct hclge_desc desc; > + int ret; > + > + if (!hnae3_dev_gro_supported(hdev)) > + return 0; > + > + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_GRO_GENERIC_CONFIG, false); > + req = (struct hclge_cfg_gro_status_cmd *)desc.data; > + > + req->gro_en = cpu_to_le16(en ? 1 : 0); > + > + ret = hclge_cmd_send(&hdev->hw, &desc, 1); > + if (ret) > + dev_err(&hdev->pdev->dev, > + "GRO hardware config cmd failed, ret = %d\n", ret); > + > + return ret; > +} > + > static int hclge_alloc_tqps(struct hclge_dev *hdev) > { > struct hclge_tqp *tqp; > @@ -7090,6 +7112,13 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) > goto err_mdiobus_unreg; > } > > + ret = hclge_config_gro(hdev, true); > + if (ret) { > + dev_err(&pdev->dev, > + "Failed to enable GRO in hardware, ret =%d\n", ret); You already printed an error in the hclge_config_gro(). > + goto err_mdiobus_unreg; > + } > + > ret = hclge_init_vlan_config(hdev); > if (ret) { > dev_err(&pdev->dev, "VLAN init fail, ret =%d\n", ret); > @@ -7221,6 +7250,13 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev) > return ret; > } > > + ret = hclge_config_gro(hdev, true); > + if (ret) { > + dev_err(&pdev->dev, > + "Failed to enable GRO in hardware, ret =%d\n", ret); Ditto > + return ret; > + } > + > ret = hclge_init_vlan_config(hdev); > if (ret) { > dev_err(&pdev->dev, "VLAN init fail, ret =%d\n", ret); > diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h > index 090541de0c7d..47030b42341f 100644 > --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h > +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_cmd.h > @@ -87,6 +87,8 @@ enum hclgevf_opcode_type { > HCLGEVF_OPC_QUERY_TX_STATUS = 0x0B03, > HCLGEVF_OPC_QUERY_RX_STATUS = 0x0B13, > HCLGEVF_OPC_CFG_COM_TQP_QUEUE = 0x0B20, > + /* GRO command */ > + HCLGEVF_OPC_GRO_GENERIC_CONFIG = 0x0C10, > /* RSS cmd */ > HCLGEVF_OPC_RSS_GENERIC_CONFIG = 0x0D01, > HCLGEVF_OPC_RSS_INPUT_TUPLE = 0x0D02, > @@ -149,6 +151,12 @@ struct hclgevf_query_res_cmd { > __le16 rsv[7]; > }; > > +#define HCLGEVF_GRO_EN_B 0 > +struct hclgevf_cfg_gro_status_cmd { > + __le16 gro_en; > + u8 rsv[22]; > +}; > + > #define HCLGEVF_RSS_DEFAULT_OUTPORT_B 4 > #define HCLGEVF_RSS_HASH_KEY_OFFSET_B 4 > #define HCLGEVF_RSS_HASH_KEY_NUM 16 > diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c > index 6b4d1477055f..3f256414fbe4 100644 > --- a/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c > +++ b/drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c > @@ -1655,6 +1655,29 @@ static int hclgevf_init_roce_base_info(struct hclgevf_dev *hdev) > return 0; > } > > +static int hclgevf_config_gro(struct hclgevf_dev *hdev, bool en) > +{ > + struct hclgevf_cfg_gro_status_cmd *req; > + struct hclgevf_desc desc; > + int ret; > + > + if (!hnae3_dev_gro_supported(hdev)) > + return 0; > + > + hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_GRO_GENERIC_CONFIG, > + false); > + req = (struct hclgevf_cfg_gro_status_cmd *)desc.data; > + > + req->gro_en = cpu_to_le16(en ? 1 : 0); > + > + ret = hclgevf_cmd_send(&hdev->hw, &desc, 1); > + if (ret) > + dev_err(&hdev->pdev->dev, > + "VF GRO hardware config cmd failed, ret = %d.\n", ret); > + > + return ret; > +} > + > static int hclgevf_rss_init_hw(struct hclgevf_dev *hdev) > { > struct hclgevf_rss_cfg *rss_cfg = &hdev->rss_cfg; > @@ -2122,6 +2145,13 @@ static int hclgevf_reset_hdev(struct hclgevf_dev *hdev) > return ret; > } > > + ret = hclgevf_config_gro(hdev, true); > + if (ret) { > + dev_err(&pdev->dev, > + "failed to enable VF GRO in hardware, ret =%d\n", ret); > + return ret; Ditto > + } > + > ret = hclgevf_init_vlan_config(hdev); > if (ret) { > dev_err(&hdev->pdev->dev, > @@ -2199,6 +2229,13 @@ static int hclgevf_init_hdev(struct hclgevf_dev *hdev) > goto err_config; > } > > + ret = hclgevf_config_gro(hdev, true); > + if (ret) { > + dev_err(&pdev->dev, > + "Failed to enable VF GRO in hardware, ret =%d\n", ret); Ditto > + goto err_config; > + } > + > /* Initialize RSS for this VF */ > ret = hclgevf_rss_init_hw(hdev); > if (ret) { > -- > 2.17.1 > > --17pEHd4RhPHOinZp Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIcBAEBAgAGBQJb6rR+AAoJEORje4g2clin8qMP/j0M4EiGaXYBv86qdQK2NxlM ZP1ankaYUAbPxQTaGu2dGkW398U3eCbD0aTKSl7HF2WvOOeF0tnL4WZe5sFCDFfk usiO9gqh/KdHHBJa3RFBTsN/2O2Dh6GJQ6fuCbxyIjHMCIW05OFIEeKYBCt2RiLe ANhM1s2e8tQe6kPm0aDuUDYIr9Qg/W0Q2gC5hf4N1Res7JkCd6f5tsVWIiziwtVD y2Nu7GA46hDWYeIBjYb21/UEaOaY3yQFM8I4gTnsj8JUXB/zx5yRDso12kE6AjH/ L95DSvtmXsNmFPadCNMLbpPk2mlMwd2GpbjKig8Yu8flkAWbNzzHB2AoFoYo7WmH hQDgVPYqzZS7HONY2yNBpMIMxGuvPTShMtxFJEeKjZv60TIAHp0s7J39ldMl0S/4 J/SpEcuG/rNNN8vnLKr5FamTWlRaH6mCxBNCxVktc62RSqFbn5+Qcj9OAshoB2rZ DAAMAoAMDqApiftKk0rFnTgYrEDS3kuBwyh+f3c4h30nJmL3Er8umUiBXd8lGGDn 1Uvxw2fyWjWDmzn1vWUtC5OMSlxacNgDoAdyPjvXsZSb2oEm/rOtqXduahtVBlR7 prTMZeSStKHYYMkDKgW+aOe4TR6z/TchJCPj5nBpDl8sJ7dha+RB3mGLukqfxZ2e zVq0RLJUVtt3UzIapVC2 =DCNk -----END PGP SIGNATURE----- --17pEHd4RhPHOinZp--