From: Borislav Petkov <bp@alien8.de>
To: KVM <kvm@vger.kernel.org>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
"Radim Krčmář" <rkrcmar@redhat.com>,
"Joerg Roedel" <joro@8bytes.org>,
"Tom Lendacky" <thomas.lendacky@amd.com>,
"Tony Luck" <tony.luck@intel.com>,
"Yazen Ghannam" <Yazen.Ghannam@amd.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH v3 1/2] kvm/x86: Move MSR_K7_HWCR to svm.c
Date: Wed, 14 Nov 2018 19:15:06 +0100 [thread overview]
Message-ID: <20181114181507.6037-2-bp@alien8.de> (raw)
In-Reply-To: <20181114181507.6037-1-bp@alien8.de>
From: Borislav Petkov <bp@suse.de>
This is an AMD-specific MSR. Put it where it belongs.
Signed-off-by: Borislav Petkov <bp@suse.de>
Tested-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
arch/x86/kvm/svm.c | 14 ++++++++++++++
arch/x86/kvm/x86.c | 12 ------------
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 0e21ccc46792..5c9c26dc7d84 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -4154,6 +4154,9 @@ static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_F10H_DECFG:
msr_info->data = svm->msr_decfg;
break;
+ case MSR_K7_HWCR:
+ msr_info->data = 0;
+ break;
default:
return kvm_get_msr_common(vcpu, msr_info);
}
@@ -4358,6 +4361,17 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
svm->msr_decfg = data;
break;
}
+ case MSR_K7_HWCR:
+ data &= ~(u64)0x40; /* ignore flush filter disable */
+ data &= ~(u64)0x100; /* ignore ignne emulation enable */
+ data &= ~(u64)0x8; /* ignore TLB cache disable */
+ data &= ~(u64)0x40000; /* ignore Mc status write enable */
+ if (data != 0) {
+ vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
+ data);
+ return 1;
+ }
+ break;
case MSR_IA32_APICBASE:
if (kvm_vcpu_apicv_active(vcpu))
avic_update_vapic_bar(to_svm(vcpu), data);
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 5cd5647120f2..d9abbe24deb5 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2434,17 +2434,6 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
break;
case MSR_EFER:
return set_efer(vcpu, data);
- case MSR_K7_HWCR:
- data &= ~(u64)0x40; /* ignore flush filter disable */
- data &= ~(u64)0x100; /* ignore ignne emulation enable */
- data &= ~(u64)0x8; /* ignore TLB cache disable */
- data &= ~(u64)0x40000; /* ignore Mc status write enable */
- if (data != 0) {
- vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
- data);
- return 1;
- }
- break;
case MSR_FAM10H_MMIO_CONF_BASE:
if (data != 0) {
vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
@@ -2713,7 +2702,6 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_K8_SYSCFG:
case MSR_K8_TSEG_ADDR:
case MSR_K8_TSEG_MASK:
- case MSR_K7_HWCR:
case MSR_VM_HSAVE_PA:
case MSR_K8_INT_PENDING_MSG:
case MSR_AMD64_NB_CFG:
--
2.19.1
next prev parent reply other threads:[~2018-11-14 18:15 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-14 18:15 [PATCH v3 0/2] x86/kvm: Enable MCE injection in the guest Borislav Petkov
2018-11-14 18:15 ` Borislav Petkov [this message]
2018-11-26 15:33 ` [PATCH v3 1/2] kvm/x86: Move MSR_K7_HWCR to svm.c David Hildenbrand
2018-11-14 18:15 ` [PATCH v3 2/2] x86/kvm: Implement MSR_HWCR support Borislav Petkov
2018-11-26 16:41 ` [PATCH v3 0/2] x86/kvm: Enable MCE injection in the guest Paolo Bonzini
2019-01-13 14:37 ` Borislav Petkov
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