* [PATCH] x86/cpu/AMD: Fix CPB bit for more processors
@ 2018-11-16 5:31 Jiaxun Yang
2018-11-16 9:54 ` Borislav Petkov
0 siblings, 1 reply; 2+ messages in thread
From: Jiaxun Yang @ 2018-11-16 5:31 UTC (permalink / raw)
To: x86; +Cc: sherry.hurwitz, linux-kernel, Jiaxun Yang
CPUID Fn8000_0007_EDX[CPB] is wrongly 0 on Model 17,
Stepping 0, but revision guide has not been released for
newer Family 17h models.
Tesed on AMD "Ryzen 7 2700U with Radeon Vega Mobile Gfx"
and "AMD Ryzen 5 2500U with Radeon Vega Mobile Gfx",
their CPUID Fn0000_0001_EAX is 0x00810f10 and should have
CPB feature according AMD product specifications, however
their Fn8000_0007_EDX is 0x00006599, indicating they don't
support CPB feature.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
arch/x86/kernel/cpu/amd.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index eeea634bee0a..7db43ef8e97e 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -821,8 +821,12 @@ static void init_amd_zn(struct cpuinfo_x86 *c)
/*
* Fix erratum 1076: CPB feature bit not being set in CPUID. It affects
* all up to and including B1.
+ *
+ * Revision guide for Family 17h, Model 17 has not been released, but
+ * Model 17, Stepping 0 have the same issue.
*/
- if (c->x86_model <= 1 && c->x86_stepping <= 1)
+ if ((c->x86_model <= 1 && c->x86_stepping <= 1) || \
+ (c->x86_model == 17 && c->x86_stepping == 0))
set_cpu_cap(c, X86_FEATURE_CPB);
}
--
2.19.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] x86/cpu/AMD: Fix CPB bit for more processors
2018-11-16 5:31 [PATCH] x86/cpu/AMD: Fix CPB bit for more processors Jiaxun Yang
@ 2018-11-16 9:54 ` Borislav Petkov
0 siblings, 0 replies; 2+ messages in thread
From: Borislav Petkov @ 2018-11-16 9:54 UTC (permalink / raw)
To: Jiaxun Yang, sherry.hurwitz; +Cc: x86, linux-kernel
On Fri, Nov 16, 2018 at 01:31:06PM +0800, Jiaxun Yang wrote:
> CPUID Fn8000_0007_EDX[CPB] is wrongly 0 on Model 17,
> Stepping 0, but revision guide has not been released for
> newer Family 17h models.
>
> Tesed on AMD "Ryzen 7 2700U with Radeon Vega Mobile Gfx"
> and "AMD Ryzen 5 2500U with Radeon Vega Mobile Gfx",
> their CPUID Fn0000_0001_EAX is 0x00810f10 and should have
> CPB feature according AMD product specifications, however
> their Fn8000_0007_EDX is 0x00006599, indicating they don't
> support CPB feature.
>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> ---
> arch/x86/kernel/cpu/amd.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
> index eeea634bee0a..7db43ef8e97e 100644
> --- a/arch/x86/kernel/cpu/amd.c
> +++ b/arch/x86/kernel/cpu/amd.c
> @@ -821,8 +821,12 @@ static void init_amd_zn(struct cpuinfo_x86 *c)
> /*
> * Fix erratum 1076: CPB feature bit not being set in CPUID. It affects
> * all up to and including B1.
> + *
> + * Revision guide for Family 17h, Model 17 has not been released, but
> + * Model 17, Stepping 0 have the same issue.
> */
> - if (c->x86_model <= 1 && c->x86_stepping <= 1)
> + if ((c->x86_model <= 1 && c->x86_stepping <= 1) || \
> + (c->x86_model == 17 && c->x86_stepping == 0))
> set_cpu_cap(c, X86_FEATURE_CPB);
> }
Actually, I'd prefer if we stopped doing all the checks and simply do
this:
if (!cpu_has(c, X86_FEATURE_CPB))
set_cpu_cap(c, X86_FEATURE_CPB);
for all F17h as it is a safe assumption that family 0x17 has CPB -
regardless of CPUID bit setting.
Sherry?
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
^ permalink raw reply [flat|nested] 2+ messages in thread
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