From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.7 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D2557C43441 for ; Fri, 16 Nov 2018 12:56:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9B6272251F for ; Fri, 16 Nov 2018 12:56:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="tlfdTNQq" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9B6272251F Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390003AbeKPXId (ORCPT ); Fri, 16 Nov 2018 18:08:33 -0500 Received: from mail.kernel.org ([198.145.29.99]:34374 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727965AbeKPXIc (ORCPT ); Fri, 16 Nov 2018 18:08:32 -0500 Received: from ziggy.de (unknown [93.176.133.217]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0865E2251A; Fri, 16 Nov 2018 12:56:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1542372974; bh=gYBMPs+aWjCk9+M58PG/AGP67bFb09qfWcas6aeoHyM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tlfdTNQqWN8ogdL86XGWjwb9FD0K+2kb1GwoqilDXqNl3f+xJNaQbCEshsbnHKd58 mZcmysEBbsuTMFzsyNP6QTFPbT/GwHzgyBKbKLWS/6Rfgh9zYqhScJ6BoC61rWWsAR eFYE5ULlnNdoCmnQ5rL7u4ZXSvGool9ZmR9xYpeU= From: matthias.bgg@kernel.org To: robh+dt@kernel.org, mark.rutland@arm.com, ck.hu@mediatek.com, p.zabel@pengutronix.de, airlied@linux.ie, mturquette@baylibre.com, sboyd@codeaurora.org, ulrich.hecht+renesas@gmail.com, laurent.pinchart@ideasonboard.com, matthias.bgg@gmail.com Cc: sean.wang@mediatek.com, sean.wang@kernel.org, rdunlap@infradead.org, wens@csie.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Matthias Brugger Subject: [PATCH v5 11/12] clk: mediatek: mt2712e: Probe with new compatible Date: Fri, 16 Nov 2018 13:54:48 +0100 Message-Id: <20181116125449.23581-12-matthias.bgg@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181116125449.23581-1-matthias.bgg@kernel.org> References: <20181116125449.23581-1-matthias.bgg@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Matthias Brugger The clock node is now a child of the mmsys node. Update the driver to support this and thenew compatible in the driver. Signed-off-by: Matthias Brugger --- drivers/clk/mediatek/clk-mt2712-mm.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt2712-mm.c b/drivers/clk/mediatek/clk-mt2712-mm.c index a8b4b6d42488..5f4ee8f0deaa 100644 --- a/drivers/clk/mediatek/clk-mt2712-mm.c +++ b/drivers/clk/mediatek/clk-mt2712-mm.c @@ -138,14 +138,15 @@ static int clk_mt2712_mm_probe(struct platform_device *pdev) { struct clk_onecell_data *clk_data; int r; - struct device_node *node = pdev->dev.of_node; + struct device parent = pdev->dev.parent; clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK); - mtk_clk_register_gates(node, mm_clks, ARRAY_SIZE(mm_clks), + mtk_clk_register_gates(parent->of_node, mm_clks, ARRAY_SIZE(mm_clks), clk_data); - r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); + r = of_clk_add_provider(parent->of_node, of_clk_src_onecell_get, + clk_data); if (r != 0) pr_err("%s(): could not register clock provider: %d\n", @@ -155,7 +156,7 @@ static int clk_mt2712_mm_probe(struct platform_device *pdev) } static const struct of_device_id of_match_clk_mt2712_mm[] = { - { .compatible = "mediatek,mt2712-mmsys", }, + { .compatible = "mediatek,mt2712-mmsys-clk", }, {} }; -- 2.19.1