From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.1 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS, URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 141D2C43441 for ; Wed, 21 Nov 2018 03:37:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C9381213A2 for ; Wed, 21 Nov 2018 03:37:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=linaro.org header.i=@linaro.org header.b="Yq4QCAaQ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C9381213A2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726773AbeKUOJt (ORCPT ); Wed, 21 Nov 2018 09:09:49 -0500 Received: from mail-pl1-f196.google.com ([209.85.214.196]:42224 "EHLO mail-pl1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725982AbeKUOJt (ORCPT ); Wed, 21 Nov 2018 09:09:49 -0500 Received: by mail-pl1-f196.google.com with SMTP id x21-v6so3365873pln.9 for ; Tue, 20 Nov 2018 19:37:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=uWtlRtowuwNl+IyLcmDh45v4DJaOWNs5T6TRjhm5rL0=; b=Yq4QCAaQCoW6o5JXfKotQAi2hAQNvxu2XXuT9MnLNea0cYdr05gH3qlP7xmXfhdTn9 2jfVfaUqPBKdWaYLxLcPG/9ckY7exwSHyjOhRCxESt9SI6StzSCfaC8JnQ0xFxqJloFy /dFFjbYdHrryZwqgrz2vxkADBdhdP/OhKir38= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=uWtlRtowuwNl+IyLcmDh45v4DJaOWNs5T6TRjhm5rL0=; b=gYm64MlRTWZ4tTSDpVD3LKjdJOE9Fcp/no7SidqcV5x7AwKM6OfLdmvSPQ2ksl59hD jjF/2vA1fzuREsmG+m71J48VIp1l+zzzrjQaksXBiiFDO0BuDPaadmZifSd9zb7Mlwip cIcyPKqQp9JDOKSLNrOcaqjH34BvMWmKAJ+5uQ75CLkIiSofbmdS5/Li6fvwTRsNz8xc cFNopgJ+pi6cDHHyrCKwWu70p1Jc5DUupPDl6xYSHIZ8n+mAQNv/tBT3RgYXtfpYhMPW Bux+qG2wLoWakuvV2wBb6++wVv8dehPh7+GpROBT9EjYhvOHPYyEcprWxn633O0/sIBi GYxA== X-Gm-Message-State: AGRZ1gKclmHeezoNIF4ARDCjQAsvtdXrAkUE2Zapkbogs2TMYWymDT8Q mBMuoJ9OmxhhkUkQLA5trPe8 X-Google-Smtp-Source: AJdET5d11aCnJwEU09MHb8cTHwamb/OttB4TGDzH1bPksfOP9t72tAChJieaN+o9RsUt4zoR7P3rmA== X-Received: by 2002:a62:d504:: with SMTP id d4mr5085608pfg.38.1542771434956; Tue, 20 Nov 2018 19:37:14 -0800 (PST) Received: from localhost.localdomain ([2409:4072:98b:9501:106a:f751:df0d:9e68]) by smtp.gmail.com with ESMTPSA id z8sm72025095pgz.53.2018.11.20.19.37.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 19:37:14 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, overseas.sales@unisoc.com, Manivannan Sadhasivam Subject: [PATCH v2 00/15] Add initial RDA8810PL SoC and Orange Pi boards support Date: Wed, 21 Nov 2018 09:06:37 +0530 Message-Id: <20181121033652.12247-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, This patchset adds initial RDA8810PL SoC and Orange Pi boards (2G IoT and i96) support. RDA8810PL is an ARM Cortex A5 based SoC with Vivante's GC860 GPU. The SoC has been added as a new ARM sub architecture with myself and Andreas as the maintainers. More information about the boards can be found in below links: 1. Orange Pi 2G-IoT - http://www.orangepi.org/OrangePi2GIOT/ 2. Orange Pi i96 - https://www.96boards.org/product/orangepi-i96/ This patchset is based on the initial revision sent out by Andreas long back (http://lists.infradead.org/pipermail/linux-arm-kernel/2017-June/515951.html). I have extended his patchset with proper irqchip and UART drivers. Now, boards can boot into initramfs with console at UART2. Thanks, Mani Changes in v2: * Used readl/writel_relaxed calls for both irqchip and timer drivers as per Marc's review. * Implemented the logic to prevent counter wrapping during read as suggested by Marc. * Used the timer-of API as per Daniel's suggestion. * Added description about the timer in both commit log and driver. * Changed the Vendor name for RDA to Unisoc Communications Inc. * Removed the soc node level and cleaned up devicetrees as per Rob's review. * Merged interrupt controller DT patch to SoC. * Moved aliases to board dts as per Arnd's suggestion. * Removed RDA Micro support mail address and used Unisoc one and added my missing signed off by tag as per Andreas's comments. Andreas Färber (4): dt-bindings: Add RDA Micro vendor prefix dt-bindings: arm: Document RDA8810PL and reference boards ARM: Prepare RDA8810PL SoC dt-bindings: serial: Document RDA Micro UART Manivannan Sadhasivam (11): dt-bindings: interrupt-controller: Document RDA8810PL intc arm: dts: Add devicetree for RDA8810PL SoC arm: dts: Add devicetree for OrangePi 2G IoT board arm: dts: Add devicetree for OrangePi i96 board irqchip: Add RDA8810PL interrupt driver dt-bindings: timer: Document RDA8810PL SoC timer arm: dts: rda8810pl: Add timer support clocksource: Add clock driver for RDA8810PL SoC arm: dts: rda8810pl: Add interrupt support for UART tty: serial: Add RDA8810PL UART driver MAINTAINERS: Add entry for RDA Micro SoC architecture .../admin-guide/kernel-parameters.txt | 6 + Documentation/devicetree/bindings/arm/rda.txt | 17 + .../interrupt-controller/rda,8810pl-intc.txt | 61 ++ .../bindings/serial/rda,8810pl-uart.txt | 15 + .../bindings/timer/rda,8810pl-timer.txt | 21 + .../devicetree/bindings/vendor-prefixes.txt | 1 + MAINTAINERS | 14 + arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 3 + .../boot/dts/rda8810pl-orangepi-2g-iot.dts | 40 + arch/arm/boot/dts/rda8810pl-orangepi-i96.dts | 40 + arch/arm/boot/dts/rda8810pl.dtsi | 99 +++ arch/arm/mach-rda/Kconfig | 9 + arch/arm/mach-rda/Makefile | 1 + drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-rda.c | 195 ++++ drivers/irqchip/Kconfig | 4 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-rda-intc.c | 113 +++ drivers/tty/serial/Kconfig | 19 + drivers/tty/serial/Makefile | 1 + drivers/tty/serial/rda-uart.c | 831 ++++++++++++++++++ include/uapi/linux/serial_core.h | 3 + 25 files changed, 1506 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rda.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt create mode 100644 Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt create mode 100644 Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-2g-iot.dts create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-i96.dts create mode 100644 arch/arm/boot/dts/rda8810pl.dtsi create mode 100644 arch/arm/mach-rda/Kconfig create mode 100644 arch/arm/mach-rda/Makefile create mode 100644 drivers/clocksource/timer-rda.c create mode 100644 drivers/irqchip/irq-rda-intc.c create mode 100644 drivers/tty/serial/rda-uart.c -- 2.17.1