From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 56217C43441 for ; Thu, 22 Nov 2018 20:02:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1B7BD208E3 for ; Thu, 22 Nov 2018 20:02:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1B7BD208E3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731743AbeKWGnA (ORCPT ); Fri, 23 Nov 2018 01:43:00 -0500 Received: from mail.bootlin.com ([62.4.15.54]:38096 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728260AbeKWGnA (ORCPT ); Fri, 23 Nov 2018 01:43:00 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 41388207AD; Thu, 22 Nov 2018 21:02:04 +0100 (CET) Received: from bbrezillon (unknown [91.160.177.164]) by mail.bootlin.com (Postfix) with ESMTPSA id 901C620714; Thu, 22 Nov 2018 21:02:03 +0100 (CET) Date: Thu, 22 Nov 2018 21:02:02 +0100 From: Boris Brezillon To: Vitor Soares Cc: wsa@the-dreams.de, linux-i2c@vger.kernel.org, corbet@lwn.net, linux-doc@vger.kernel.org, gregkh@linuxfoundation.org, arnd@arndb.de, psroka@cadence.com, agolec@cadence.com, adouglas@cadence.com, bfolta@cadence.com, dkos@cadence.com, alicja@cadence.com, cwronka@cadence.com, sureshp@cadence.com, rafalc@cadence.com, thomas.petazzoni@bootlin.com, nm@ti.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, geert@linux-m68k.org, linus.walleij@linaro.org, Xiang.Lin@synaptics.com, linux-gpio@vger.kernel.org, nsekhar@ti.com, pgaj@cadence.com, peda@axentia.se, mshettel@codeaurora.org, swboyd@chromium.org, joao.pinto@synopsys.com Subject: Re: [PATCH] i3c: master: dw: split dw-i3c-master.c into master and bus specific parts Message-ID: <20181122210202.6af50fcc@bbrezillon> In-Reply-To: References: X-Mailer: Claws Mail 3.16.0 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 22 Nov 2018 17:54:54 +0000 Vitor Soares wrote: > From: Vitor Soares > > This patch slipts dw-i3c-master.c into three pieces: > dw-i3c-master.c - contains the code that interacts directly with the > core in master mode. > > dw-i3c-platdrv.c - contains the code specific to the platform driver. > > dw-i3c-core.h - contains the definitions and declarations shared by > dw-i3c-master and dw-i3c-platdrv > > This patch will allow SOC integrators to add their code specific to > DesignWare I3C IP. Isn't it too early to do this change? Can't we wait until we have a SoC that actually embeds this IP? > > Signed-off-by: Vitor Soares > --- > drivers/i3c/master/Kconfig | 9 +- > drivers/i3c/master/Makefile | 5 +- > drivers/i3c/master/dw-i3c-core.h | 214 ++++++++++++++++++++++++++ > drivers/i3c/master/dw-i3c-master.c | 299 ++---------------------------------- > drivers/i3c/master/dw-i3c-platdrv.c | 112 ++++++++++++++ I'd prefer to have a dw/ subdir where you'd place all dw files. > 5 files changed, 349 insertions(+), 290 deletions(-) > create mode 100644 drivers/i3c/master/dw-i3c-core.h > create mode 100644 drivers/i3c/master/dw-i3c-platdrv.c > > diff --git a/drivers/i3c/master/Kconfig b/drivers/i3c/master/Kconfig > index 8ee1ce6..fdc6e46 100644 > --- a/drivers/i3c/master/Kconfig > +++ b/drivers/i3c/master/Kconfig > @@ -5,9 +5,14 @@ config CDNS_I3C_MASTER > help > Enable this driver if you want to support Cadence I3C master block. > > -config DW_I3C_MASTER > - tristate "Synospsys DesignWare I3C master driver" > +config DW_I3C_CORE > + tristate > + > +config DW_I3C_PLATFORM > + tristate "Synospsys DesignWare I3C Platform driver" > + select DW_I3C_CORE > depends on I3C > + depends on HAS_IOMEM > depends on !(ALPHA || PARISC) > # ALPHA and PARISC needs {read,write}sl() > help > diff --git a/drivers/i3c/master/Makefile b/drivers/i3c/master/Makefile > index fc53939..004ad1c 100644 > --- a/drivers/i3c/master/Makefile > +++ b/drivers/i3c/master/Makefile > @@ -1,2 +1,5 @@ > obj-$(CONFIG_CDNS_I3C_MASTER) += i3c-master-cdns.o > -obj-$(CONFIG_DW_I3C_MASTER) += dw-i3c-master.o > +obj-$(CONFIG_DW_I3C_CORE) += dw-i3c-core.o > +dw-i3c-core-objs := dw-i3c-master.o > +obj-$(CONFIG_DW_I3C_PLATFORM) += dw-i3c-platform.o > +dw-i3c-platform-objs := dw-i3c-platdrv.o Do we really have to create one module for the core and one per SoC? Can't we have everything in the same .ko?