Re: [PATCH V2] clk: tegra: Return the exact clock rate from clk_round_rate

From: Thierry Reding <thierry.reding@gmail.com>
To: Robert Yang <decatf@gmail.com>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH V2] clk: tegra: Return the exact clock rate from clk_round_rate
Date: Wed, 28 Nov 2018 10:16:42 +0100	[thread overview]
Message-ID: <20181128091642.GC17419@ulmo> (raw)
In-Reply-To: <20180925214940.15188-1-decatf@gmail.com>

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On Tue, Sep 25, 2018 at 05:49:40PM -0400, Robert Yang wrote:
> The current behavior is that clk_round_rate would return the same clock
> rate passed to it for valid PLL configurations. This change will return
> the exact rate the PLL will provide in accordance with clk API.
> 
> Signed-off-by: Robert Yang <decatf@gmail.com>
> ---
> Changes in V2:
>  - Move input divider (m == 0) check into the cfg constraints check
>    condition. Forgo adding WARN_ON and avoid using 0 input divider
>    all together.
> 
>  drivers/clk/tegra/clk-pll.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)

Acked-by: Thierry Reding <treding@nvidia.com>

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