On Tue, Dec 04, 2018 at 11:28:37AM +0530, Kishon Vijay Abraham I wrote:
> Hi Maxime,
> 
> On 21/11/18 3:03 PM, Maxime Ripard wrote:
> > Hi Sakari,
> > 
> > Thanks for your review.
> > 
> > On Mon, Nov 19, 2018 at 03:43:57PM +0200, Sakari Ailus wrote:
> >>> +/*
> >>> + * Minimum D-PHY timings based on MIPI D-PHY specification. Derived
> >>> + * from the valid ranges specified in Section 6.9, Table 14, Page 41
> >>> + * of the D-PHY specification (v2.1).
> >>
> >> I assume these values are compliant with the earlier spec releases.
> > 
> > I have access to the versions 1.2 and 2.1 of the spec and as far as I
> > can tell, they match here. I can't really say for other releases, but
> > I wouldn't expect any changes (and it can always be adjusted later on
> > if needed).
> > 
> >>> + */
> >>> +int phy_mipi_dphy_get_default_config(unsigned long pixel_clock,
> >>
> >> How about using the bus frequency instead of the pixel clock? Chances are
> >> that the caller already has that information, instead of calculating it
> >> here?
> > 
> > I went for the pixel clock since it's something that all drivers will
> > have access too without any computation. The bus frequency can be
> > available as well in v4l2, but won't be in DRM, and that would require
> > for all drivers to duplicate that computation, which doesn't seem like
> > a good choice.
> > 
> >>> +				     unsigned int bpp,
> >>> +				     unsigned int lanes,
> >>> +				     struct phy_configure_opts_mipi_dphy *cfg)
> >>> +{
> >>> +	unsigned long hs_clk_rate;
> >>> +	unsigned long ui;
> >>> +
> >>> +	if (!cfg)
> >>> +		return -EINVAL;
> >>> +
> >>> +	hs_clk_rate = pixel_clock * bpp / lanes;
> >>> +	ui = DIV_ROUND_UP(NSEC_PER_SEC, hs_clk_rate);
> >>
> >> Nanoseconds may not be precise enough for practical computations on these
> >> values. At 1 GHz, this ends up being precisely 1. At least Intel hardware
> >> has some more precision, I presume others do, too. How about using
> >> picoseconds instead?
> > 
> > Sounds like a good idea.
> 
> Would you be fixing this? Or this can be a later patch?

I have fixed this locally, but I wanted to wait a bit for more
feedback. I can send a new version if you prefer.

Maxime

-- 
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com