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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
	Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Robin Murphy <robin.murphy@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Suzuki Poulose <suzuki.poulose@arm.com>,
	Dave Martin <Dave.Martin@arm.com>
Subject: [PATCH 5/5] arm64/mm: use string comparisons in dcache_by_line_op
Date: Thu,  6 Dec 2018 16:57:39 +0100	[thread overview]
Message-ID: <20181206155739.20229-6-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <20181206155739.20229-1-ard.biesheuvel@linaro.org>

The GAS directives that are currently being used in dcache_by_line_op
rely on assembler behavior that is not documented, and probably not
guaranteed to produce the correct behavior going forward.

Currently, we end up with some undefined symbols in cache.o:

$ nm arch/arm64/mm/cache.o
         ...
         U civac
         ...
         U cvac
         U cvap
         U cvau

This is due to the fact that the comparisons used to select the
operation type in the dcache_by_line_op macro are comparing symbols
not strings, and even though it seems that GAS is doing the right
thing here (undefined symbols by the same name are equal to each
other), it seems unwise to rely on this.

So let's switch to conditional directives that are documented as
operating on strings. Since these cannot be combined like ordinary
arithmetic expressions, invert the comparison logic.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 arch/arm64/include/asm/assembler.h | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 09c5a5452f60..df3043e76e6a 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -383,21 +383,23 @@ alternative_endif
 	sub	\tmp2, \tmp1, #1
 	bic	\kaddr, \kaddr, \tmp2
 9998:
-	.if	(\op == cvau || \op == cvac)
+	.ifnc	\op, civac
+	.ifnc	\op, cvap
 alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE
 	dc	\op, \kaddr
 alternative_else
 	dc	civac, \kaddr
 alternative_endif
-	.elseif	(\op == cvap)
+	.else
 alternative_cb arm64_handle_dc_cvap
 	dc	civac, \kaddr
 alternative_cb_alt
 	sys	3, c7, c12, 1, \kaddr	// dc cvap
 	dc	cvac, \kaddr
 alternative_cb_end
+	.endif
 	.else
-	dc	\op, \kaddr
+	dc	civac, \kaddr
 	.endif
 	add	\kaddr, \kaddr, \tmp1
 	cmp	\kaddr, \size
-- 
2.19.2


  parent reply	other threads:[~2018-12-06 15:59 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-06 15:57 [PATCH 0/5] arm64: assorted fixes for dcache_by_line_op Ard Biesheuvel
2018-12-06 15:57 ` [PATCH 1/5] arm64/alternative_cb: move callback reference into replacements section Ard Biesheuvel
2018-12-06 15:57 ` [PATCH 2/5] arm64/alternative_cb: add nr_alts parameter to callback handlers Ard Biesheuvel
2018-12-06 15:57 ` [PATCH 3/5] arm64/alternative_cb: add support for alternative sequences Ard Biesheuvel
2018-12-06 15:57 ` [PATCH 4/5] arm64/assembler: use callback to 3-way alt-patch DC CVAP instructions Ard Biesheuvel
2018-12-06 15:57 ` Ard Biesheuvel [this message]
2018-12-07 17:53 ` [PATCH 0/5] arm64: assorted fixes for dcache_by_line_op Will Deacon
2018-12-07 18:01   ` Ard Biesheuvel
2018-12-10 14:50   ` Robin Murphy

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