[PATCH] drm/msm: fix arm64 build error

[Arnd Bergmann <arnd@arndb.de>]

The new a200 GPU MMU support fails to build on arm64 because
of a conflicting macro name:

drivers/gpu/drm/msm/msm_gpummu.c:17: error: "VA_START" redefined [-Werror]
 #define VA_START SZ_16M

In file included from arch/arm64/include/asm/pgtable-hwdef.h:19,
                 from arch/arm64/include/asm/processor.h:48,
                 from include/linux/mutex.h:19,
                 from include/linux/notifier.h:14,
                 from include/linux/clk.h:17,
                 from drivers/gpu/drm/msm/msm_drv.h:23,
                 from drivers/gpu/drm/msm/msm_gpummu.c:4:
arch/arm64/include/asm/memory.h:51: note: this is the location of the previous definition
 #define VA_START  (UL(0xffffffffffffffff) - \

Rename this and the related macros with a GPU_ prefix.

Fixes: 1c0088f255ae ("drm/msm: implement a2xx mmu")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 drivers/gpu/drm/msm/msm_gpummu.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/msm/msm_gpummu.c b/drivers/gpu/drm/msm/msm_gpummu.c
index f1dc2b7e5fd3..2a7ddd449d3d 100644
--- a/drivers/gpu/drm/msm/msm_gpummu.c
+++ b/drivers/gpu/drm/msm/msm_gpummu.c
@@ -14,10 +14,10 @@ struct msm_gpummu {
 };
 #define to_msm_gpummu(x) container_of(x, struct msm_gpummu, base)
 
-#define VA_START SZ_16M
-#define VA_RANGE (0xfff * SZ_64K)
-#define MMU_PAGE_SIZE SZ_4K
-#define TABLE_SIZE (sizeof(uint32_t) * VA_RANGE / MMU_PAGE_SIZE)
+#define GPU_VA_START SZ_16M
+#define GPU_VA_RANGE (0xfff * SZ_64K)
+#define GPU_MMU_PAGE_SIZE SZ_4K
+#define GPU_TABLE_SIZE (sizeof(uint32_t) * GPU_VA_RANGE / GPU_MMU_PAGE_SIZE)
 
 static int msm_gpummu_attach(struct msm_mmu *mmu, const char * const *names,
 		int cnt)
@@ -34,7 +34,7 @@ static int msm_gpummu_map(struct msm_mmu *mmu, uint64_t iova,
 		struct sg_table *sgt, unsigned len, int prot)
 {
 	struct msm_gpummu *gpummu = to_msm_gpummu(mmu);
-	unsigned idx = (iova - VA_START) / MMU_PAGE_SIZE;
+	unsigned idx = (iova - GPU_VA_START) / GPU_MMU_PAGE_SIZE;
 	struct scatterlist *sg;
 	unsigned prot_bits = 0;
 	unsigned i, j;
@@ -46,9 +46,9 @@ static int msm_gpummu_map(struct msm_mmu *mmu, uint64_t iova,
 
 	for_each_sg(sgt->sgl, sg, sgt->nents, i) {
 		dma_addr_t addr = sg->dma_address;
-		for (j = 0; j < sg->length / MMU_PAGE_SIZE; j++, idx++) {
+		for (j = 0; j < sg->length / GPU_MMU_PAGE_SIZE; j++, idx++) {
 			gpummu->table[idx] = addr | prot_bits;
-			addr += MMU_PAGE_SIZE;
+			addr += GPU_MMU_PAGE_SIZE;
 		}
 	}
 
@@ -62,10 +62,10 @@ static int msm_gpummu_map(struct msm_mmu *mmu, uint64_t iova,
 static int msm_gpummu_unmap(struct msm_mmu *mmu, uint64_t iova, unsigned len)
 {
 	struct msm_gpummu *gpummu = to_msm_gpummu(mmu);
-	unsigned idx = (iova - VA_START) / MMU_PAGE_SIZE;
+	unsigned idx = (iova - GPU_VA_START) / GPU_MMU_PAGE_SIZE;
 	unsigned i;
 
-	for (i = 0; i < len / MMU_PAGE_SIZE; i++, idx++)
+	for (i = 0; i < len / GPU_MMU_PAGE_SIZE; i++, idx++)
                 gpummu->table[idx] = 0;
 
 	gpu_write(gpummu->gpu, REG_A2XX_MH_MMU_INVALIDATE,
@@ -78,7 +78,7 @@ static void msm_gpummu_destroy(struct msm_mmu *mmu)
 {
 	struct msm_gpummu *gpummu = to_msm_gpummu(mmu);
 
-	dma_free_attrs(mmu->dev, TABLE_SIZE, gpummu->table, gpummu->pt_base,
+	dma_free_attrs(mmu->dev, GPU_TABLE_SIZE, gpummu->table, gpummu->pt_base,
 		DMA_ATTR_FORCE_CONTIGUOUS);
 
 	kfree(gpummu);
@@ -100,7 +100,7 @@ struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu)
 	if (!gpummu)
 		return ERR_PTR(-ENOMEM);
 
-	gpummu->table = dma_alloc_attrs(dev, TABLE_SIZE + 32, &gpummu->pt_base,
+	gpummu->table = dma_alloc_attrs(dev, GPU_TABLE_SIZE + 32, &gpummu->pt_base,
 		GFP_KERNEL | __GFP_ZERO, DMA_ATTR_FORCE_CONTIGUOUS);
 	if (!gpummu->table) {
 		kfree(gpummu);
@@ -119,5 +119,5 @@ void msm_gpummu_params(struct msm_mmu *mmu, dma_addr_t *pt_base,
 	dma_addr_t base = to_msm_gpummu(mmu)->pt_base;
 
 	*pt_base = base;
-	*tran_error = base + TABLE_SIZE; /* 32-byte aligned */
+	*tran_error = base + GPU_TABLE_SIZE; /* 32-byte aligned */
 }
-- 
2.20.0