From: Keith Busch <keith.busch@intel.com>
To: linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org,
linux-mm@kvack.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Rafael Wysocki <rafael@kernel.org>,
Dave Hansen <dave.hansen@intel.com>,
Dan Williams <dan.j.williams@intel.com>,
Keith Busch <keith.busch@intel.com>
Subject: [PATCHv2 04/12] Documentation/ABI: Add new node sysfs attributes
Date: Mon, 10 Dec 2018 18:03:02 -0700 [thread overview]
Message-ID: <20181211010310.8551-5-keith.busch@intel.com> (raw)
In-Reply-To: <20181211010310.8551-1-keith.busch@intel.com>
Add the entries for primary cpu and memory node attributes.
Signed-off-by: Keith Busch <keith.busch@intel.com>
---
Documentation/ABI/stable/sysfs-devices-node | 34 ++++++++++++++++++++++++++++-
1 file changed, 33 insertions(+), 1 deletion(-)
diff --git a/Documentation/ABI/stable/sysfs-devices-node b/Documentation/ABI/stable/sysfs-devices-node
index 3e90e1f3bf0a..8430d5b261f6 100644
--- a/Documentation/ABI/stable/sysfs-devices-node
+++ b/Documentation/ABI/stable/sysfs-devices-node
@@ -90,4 +90,36 @@ Date: December 2009
Contact: Lee Schermerhorn <lee.schermerhorn@hp.com>
Description:
The node's huge page size control/query attributes.
- See Documentation/admin-guide/mm/hugetlbpage.rst
\ No newline at end of file
+ See Documentation/admin-guide/mm/hugetlbpage.rst
+
+What: /sys/devices/system/node/nodeX/primary_cpu_nodelist
+Date: December 2018
+Contact: Keith Busch <keith.busch@intel.com>
+Description:
+ The node list of CPUs that have primary access to this node's
+ memory. CPUs not in the list accessing this node's memory may
+ encounter a performance penalty.
+
+What: /sys/devices/system/node/nodeX/primary_cpu_nodemask
+Date: December 2018
+Contact: Keith Busch <keith.busch@intel.com>
+Description:
+ The node map for CPUs that have primary access to this node's
+ memory. CPUs not in the list accessing this node's memory may
+ encounter a performance penalty.
+
+What: /sys/devices/system/node/nodeX/primary_mem_nodelist
+Date: December 2018
+Contact: Keith Busch <keith.busch@intel.com>
+Description:
+ The list of memory nodes that this node has primary access.
+ Memory accesses from this node to nodes not in this list may
+ encounter a performance penalty.
+
+What: /sys/devices/system/node/nodeX/primary_mem_nodemask
+Date: December 2018
+Contact: Keith Busch <keith.busch@intel.com>
+Description:
+ The map of memory nodes that this node has primary access.
+ Memory accesses from this node to nodes not in this map may
+ encounter a performance penalty.
--
2.14.4
next prev parent reply other threads:[~2018-12-11 1:06 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-11 1:02 [PATCHv2 00/12] Heterogeneous memory node attributes Keith Busch
2018-12-11 1:02 ` [PATCHv2 01/12] acpi: Create subtable parsing infrastructure Keith Busch
2018-12-11 9:44 ` Rafael J. Wysocki
2018-12-19 23:19 ` Schmauss, Erik
2018-12-19 23:59 ` Dan Williams
2018-12-20 1:15 ` Schmauss, Erik
2018-12-20 8:57 ` Rafael J. Wysocki
2018-12-20 19:00 ` Schmauss, Erik
2018-12-13 9:05 ` kbuild test robot
2018-12-19 22:10 ` kbuild test robot
2018-12-11 1:03 ` [PATCHv2 02/12] acpi/hmat: Parse and report heterogeneous memory Keith Busch
2018-12-11 6:03 ` Dan Williams
2018-12-11 16:55 ` Keith Busch
2018-12-11 20:29 ` Dan Williams
2018-12-11 20:44 ` Keith Busch
2018-12-11 22:50 ` Dan Williams
2018-12-11 1:03 ` [PATCHv2 03/12] node: Link memory nodes to their compute nodes Keith Busch
2018-12-11 1:03 ` Keith Busch [this message]
2018-12-11 1:03 ` [PATCHv2 05/12] acpi/hmat: Register processor domain to its memory Keith Busch
2018-12-11 1:03 ` [PATCHv2 06/12] node: Add heterogenous memory performance Keith Busch
2018-12-11 1:03 ` [PATCHv2 07/12] Documentation/ABI: Add node performance attributes Keith Busch
2018-12-11 1:03 ` [PATCHv2 08/12] acpi/hmat: Register " Keith Busch
2018-12-11 1:03 ` [PATCHv2 09/12] node: Add memory caching attributes Keith Busch
2018-12-11 1:03 ` [PATCHv2 10/12] Documentation/ABI: Add node cache attributes Keith Busch
2018-12-11 1:03 ` [PATCHv2 11/12] acpi/hmat: Register memory side " Keith Busch
2018-12-11 1:03 ` [PATCHv2 12/12] doc/mm: New documentation for memory performance Keith Busch
2018-12-11 6:45 ` Mike Rapoport
2018-12-12 4:53 ` Aneesh Kumar K.V
2018-12-12 14:45 ` Keith Busch
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181211010310.8551-5-keith.busch@intel.com \
--to=keith.busch@intel.com \
--cc=dan.j.williams@intel.com \
--cc=dave.hansen@intel.com \
--cc=gregkh@linuxfoundation.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mm@kvack.org \
--cc=rafael@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).