From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.9 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8763EC65BAF for ; Wed, 12 Dec 2018 10:22:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 48E172084E for ; Wed, 12 Dec 2018 10:22:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 48E172084E Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727178AbeLLKWH (ORCPT ); Wed, 12 Dec 2018 05:22:07 -0500 Received: from mail.bootlin.com ([62.4.15.54]:57465 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726869AbeLLKWG (ORCPT ); Wed, 12 Dec 2018 05:22:06 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id B659220DC3; Wed, 12 Dec 2018 11:22:03 +0100 (CET) Received: from localhost.localdomain (aaubervilliers-681-1-89-7.w90-88.abo.wanadoo.fr [90.88.30.7]) by mail.bootlin.com (Postfix) with ESMTPSA id 5298B2082C; Wed, 12 Dec 2018 11:21:45 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , Bjorn Helgaas Cc: , Rob Herring , Mark Rutland , Lorenzo Pieralisi , linux-pci@vger.kernel.org, , , Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal Subject: [PATCH v2 04/12] PCI: aardvark: Add clock support Date: Wed, 12 Dec 2018 11:21:34 +0100 Message-Id: <20181212102142.16053-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181212102142.16053-1-miquel.raynal@bootlin.com> References: <20181212102142.16053-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The IP relies on a gated clock. When we will add S2RAM support, this clock will need to be resumed before any PCIe registers are accessed. Add support for this clock. Signed-off-by: Miquel Raynal --- drivers/pci/controller/pci-aardvark.c | 29 +++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index da695572a2ed..108b3f15c410 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -8,6 +8,7 @@ * Author: Hezi Shahmoon */ +#include #include #include #include @@ -190,6 +191,7 @@ struct advk_pcie { struct platform_device *pdev; + struct clk *clk; void __iomem *base; struct list_head resources; struct irq_domain *irq_domain; @@ -1083,6 +1085,29 @@ static int advk_pcie_setup_phy(struct advk_pcie *pcie) return ret; } +static int advk_pcie_setup_clk(struct advk_pcie *pcie) +{ + struct device *dev = &pcie->pdev->dev; + int ret; + + pcie->clk = devm_clk_get(dev, NULL); + if (IS_ERR(pcie->clk) && (PTR_ERR(pcie->clk) == -EPROBE_DEFER)) + return PTR_ERR(pcie->clk); + + /* Old bindings miss the clock handle */ + if (IS_ERR(pcie->clk)) { + dev_warn(dev, "Clock unavailable (%ld)\n", PTR_ERR(pcie->clk)); + pcie->clk = NULL; + return 0; + } + + ret = clk_prepare_enable(pcie->clk); + if (ret) + dev_err(dev, "Clock initialization failed (%d)\n", ret); + + return ret; +} + static int advk_pcie_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1118,6 +1143,10 @@ static int advk_pcie_probe(struct platform_device *pdev) return ret; } + ret = advk_pcie_setup_clk(pcie); + if (ret) + return ret; + ret = advk_pcie_setup_phy(pcie); if (ret) return ret; -- 2.19.1