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From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Jagan Teki <jagan@amarulasolutions.com>
Cc: Yong Deng <yong.deng@magewell.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>, Chen-Yu Tsai <wens@csie.org>,
	linux-media <linux-media@vger.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	linux-sunxi <linux-sunxi@googlegroups.com>,
	linux-amarula@amarulasolutions.com,
	Michael Trimarchi <michael@amarulasolutions.com>
Subject: Re: [PATCH v5 2/6] media: sun6i: Add mod_rate quirk
Date: Mon, 7 Jan 2019 14:29:29 +0100	[thread overview]
Message-ID: <20190107132929.ksyajmzn2gzr6oep@flea> (raw)
In-Reply-To: <CAMty3ZCG5cF3tP2mid5xyS=yhtxkY+TOcGkwRkv+vrZt1=0iQg@mail.gmail.com>

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On Mon, Dec 24, 2018 at 08:57:48PM +0530, Jagan Teki wrote:
> On Fri, Dec 21, 2018 at 6:30 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> >
> > On Thu, Dec 20, 2018 at 06:24:34PM +0530, Jagan Teki wrote:
> > > Unfortunately default CSI_SCLK rate cannot work properly to
> > > drive the connected sensor interface, particularly on few
> > > Allwinner SoC's like A64.
> > >
> > > So, add mod_rate quirk via driver data so-that the respective
> > > SoC's which require to alter the default mod clock rate can assign
> > > the operating clock rate.
> > >
> > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > > ---
> > >  .../platform/sunxi/sun6i-csi/sun6i_csi.c      | 34 +++++++++++++++----
> > >  1 file changed, 28 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> > > index ee882b66a5ea..fe002beae09c 100644
> > > --- a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> > > +++ b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
> > > @@ -15,6 +15,7 @@
> > >  #include <linux/ioctl.h>
> > >  #include <linux/module.h>
> > >  #include <linux/of.h>
> > > +#include <linux/of_device.h>
> > >  #include <linux/platform_device.h>
> > >  #include <linux/pm_runtime.h>
> > >  #include <linux/regmap.h>
> > > @@ -28,8 +29,13 @@
> > >
> > >  #define MODULE_NAME  "sun6i-csi"
> > >
> > > +struct sun6i_csi_variant {
> > > +     unsigned long                   mod_rate;
> > > +};
> > > +
> > >  struct sun6i_csi_dev {
> > >       struct sun6i_csi                csi;
> > > +     const struct sun6i_csi_variant  *variant;
> > >       struct device                   *dev;
> > >
> > >       struct regmap                   *regmap;
> > > @@ -822,33 +828,43 @@ static int sun6i_csi_resource_request(struct sun6i_csi_dev *sdev,
> > >               return PTR_ERR(sdev->clk_mod);
> > >       }
> > >
> > > +     if (sdev->variant->mod_rate)
> > > +             clk_set_rate_exclusive(sdev->clk_mod, sdev->variant->mod_rate);
> > > +
> >
> > It still doesn't make any sense to do it in the probe function...
> 
> I'm not sure we discussed about the context wrt probe, we discussed
> about exclusive put clock.

https://lkml.org/lkml/2018/12/18/584

"Doing it here is not really optimal either, since you'll put a
constraint on the system (maintaining that clock at 300MHz), while
it's not in use."

> Since clocks were enabling in set_power and clock rate can be set
> during probe in single time instead of setting it in set_power for
> every power enablement. anything wrong with that.

See above.

Plus, a clock running draws power. It doesn't really make sense to
draw power for something that is unused.

> > We discussed this in the previous iteration already.
> >
> > What we didn't discuss is the variant function that you introduce,
> > while the previous approach was enough.
> 
> We discussed about clk_rate_exclusive_put, and that even handle it in
> .remove right? so I have variant to handle it in sun6i_csi_remove.

We indeed discussed the clk_rate_exclusive_put. However, you chose to
implement it using a variant structure which really isn't needed.

Maxime

-- 
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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  parent reply	other threads:[~2019-01-07 13:29 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-20 12:54 [PATCH v5 0/6] media/sun6i: Allwinner A64 CSI support Jagan Teki
2018-12-20 12:54 ` [PATCH v5 1/6] dt-bindings: media: sun6i: Add A64 CSI compatible Jagan Teki
2018-12-20 12:54 ` [PATCH v5 2/6] media: sun6i: Add mod_rate quirk Jagan Teki
2018-12-21 13:00   ` Maxime Ripard
2018-12-24 15:27     ` Jagan Teki
2019-01-06 16:30       ` Jagan Teki
2019-01-07 13:29       ` Maxime Ripard [this message]
2019-01-11  6:05         ` Jagan Teki
2019-01-11  6:24         ` Jagan Teki
2019-01-16 11:11           ` Maxime Ripard
2019-01-17  4:34             ` Jagan Teki
2018-12-20 12:54 ` [PATCH v5 3/6] media: sun6i: Add A64 CSI block support Jagan Teki
2018-12-20 12:54 ` [PATCH v5 4/6] arm64: dts: allwinner: a64: Add A64 CSI controller Jagan Teki
2018-12-20 12:54 ` [PATCH v5 5/6] arm64: dts: allwinner: a64: Add pinmux setting for CSI MCLK on PE1 Jagan Teki
2018-12-20 12:54 ` [DO NOT MERGE] [PATCH v5 6/6] arm64: dts: allwinner: bananapi-m64: Add HDF5640 camera module Jagan Teki

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