From: Rajendra Nayak <rnayak@codeaurora.org>
To: andy.gross@linaro.org, robh@kernel.org, viresh.kumar@linaro.org,
sboyd@kernel.org, ulf.hansson@linaro.org,
collinsd@codeaurora.org, mka@chromium.org
Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, henryc.chen@mediatek.com,
Rajendra Nayak <rnayak@codeaurora.org>
Subject: [PATCH v11 3/9] dt-bindings: power: Add qcom rpm power domain driver bindings
Date: Thu, 10 Jan 2019 09:32:03 +0530 [thread overview]
Message-ID: <20190110040209.6028-4-rnayak@codeaurora.org> (raw)
In-Reply-To: <20190110040209.6028-1-rnayak@codeaurora.org>
Add DT bindings to describe the rpm/rpmh power domains found on Qualcomm
Technologies, Inc. SoCs. These power domains communicate a performance
state to RPM/RPMh, which then translates it into corresponding voltage on a
PMIC rail.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/power/qcom,rpmpd.txt | 145 ++++++++++++++++++
include/dt-bindings/power/qcom-rpmpd.h | 39 +++++
2 files changed, 184 insertions(+)
create mode 100644 Documentation/devicetree/bindings/power/qcom,rpmpd.txt
create mode 100644 include/dt-bindings/power/qcom-rpmpd.h
diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.txt b/Documentation/devicetree/bindings/power/qcom,rpmpd.txt
new file mode 100644
index 000000000000..980e5413d18f
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.txt
@@ -0,0 +1,145 @@
+Qualcomm RPM/RPMh Power domains
+
+For RPM/RPMh Power domains, we communicate a performance state to RPM/RPMh
+which then translates it into a corresponding voltage on a rail
+
+Required Properties:
+ - compatible: Should be one of the following
+ * qcom,msm8996-rpmpd: RPM Power domain for the msm8996 family of SoC
+ * qcom,sdm845-rpmhpd: RPMh Power domain for the sdm845 family of SoC
+ - #power-domain-cells: number of cells in Power domain specifier
+ must be 1.
+ - operating-points-v2: Phandle to the OPP table for the Power domain.
+ Refer to Documentation/devicetree/bindings/power/power_domain.txt
+ and Documentation/devicetree/bindings/opp/opp.txt for more details
+
+Refer to <dt-bindings/power/qcom-rpmpd.h> for the level values for
+various OPPs for different platforms as well as Power domain indexes
+
+Example: rpmh power domain controller and OPP table
+
+#include <dt-bindings/power/qcom-rpmhpd.h>
+
+opp-level values specified in the OPP tables for RPMh power domains
+should use the RPMH_REGULATOR_LEVEL_* constants from
+<dt-bindings/power/qcom-rpmhpd.h>
+
+ rpmhpd: power-controller {
+ compatible = "qcom,sdm845-rpmhpd";
+ #power-domain-cells = <1>;
+ operating-points-v2 = <&rpmhpd_opp_table>;
+
+ rpmhpd_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ rpmhpd_opp_ret: opp1 {
+ opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
+ };
+
+ rpmhpd_opp_min_svs: opp2 {
+ opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
+ };
+
+ rpmhpd_opp_low_svs: opp3 {
+ opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+ };
+
+ rpmhpd_opp_svs: opp4 {
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+ };
+
+ rpmhpd_opp_svs_l1: opp5 {
+ opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+ };
+
+ rpmhpd_opp_nom: opp6 {
+ opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
+ };
+
+ rpmhpd_opp_nom_l1: opp7 {
+ opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+ };
+
+ rpmhpd_opp_nom_l2: opp8 {
+ opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
+ };
+
+ rpmhpd_opp_turbo: opp9 {
+ opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
+ };
+
+ rpmhpd_opp_turbo_l1: opp10 {
+ opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
+ };
+ };
+ };
+
+Example: rpm power domain controller and OPP table
+
+ rpmpd: power-controller {
+ compatible = "qcom,msm8996-rpmpd";
+ #power-domain-cells = <1>;
+ operating-points-v2 = <&rpmpd_opp_table>;
+
+ rpmpd_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ rpmpd_opp_low: opp1 {
+ opp-level = <1>;
+ };
+
+ rpmpd_opp_ret: opp2 {
+ opp-level = <2>;
+ };
+
+ rpmpd_opp_svs: opp3 {
+ opp-level = <3>;
+ };
+
+ rpmpd_opp_normal: opp4 {
+ opp-level = <4>;
+ };
+
+ rpmpd_opp_high: opp5 {
+ opp-level = <5>;
+ };
+
+ rpmpd_opp_turbo: opp6 {
+ opp-level = <6>;
+ };
+ };
+ };
+
+Example: Client/Consumer device using OPP table
+
+ leaky-device0@12350000 {
+ compatible = "foo,i-leak-current";
+ reg = <0x12350000 0x1000>;
+ power-domains = <&rpmhpd SDM845_MX>;
+ operating-points-v2 = <&leaky_opp_table>;
+ };
+
+
+ leaky_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp1 {
+ opp-hz = /bits/ 64 <144000>;
+ required-opps = <&rpmhpd_opp_low>;
+ };
+
+ opp2 {
+ opp-hz = /bits/ 64 <400000>;
+ required-opps = <&rpmhpd_opp_ret>;
+ };
+
+ opp3 {
+ opp-hz = /bits/ 64 <20000000>;
+ required-opps = <&rpmpd_opp_svs>;
+ };
+
+ opp4 {
+ opp-hz = /bits/ 64 <25000000>;
+ required-opps = <&rpmpd_opp_normal>;
+ };
+ };
diff --git a/include/dt-bindings/power/qcom-rpmpd.h b/include/dt-bindings/power/qcom-rpmpd.h
new file mode 100644
index 000000000000..87d9c6611682
--- /dev/null
+++ b/include/dt-bindings/power/qcom-rpmpd.h
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/* Copyright (c) 2018, The Linux Foundation. All rights reserved. */
+
+#ifndef _DT_BINDINGS_POWER_QCOM_RPMPD_H
+#define _DT_BINDINGS_POWER_QCOM_RPMPD_H
+
+/* SDM845 Power Domain Indexes */
+#define SDM845_EBI 0
+#define SDM845_MX 1
+#define SDM845_MX_AO 2
+#define SDM845_CX 3
+#define SDM845_CX_AO 4
+#define SDM845_LMX 5
+#define SDM845_LCX 6
+#define SDM845_GFX 7
+#define SDM845_MSS 8
+
+/* SDM845 Power Domain performance levels */
+#define RPMH_REGULATOR_LEVEL_RETENTION 16
+#define RPMH_REGULATOR_LEVEL_MIN_SVS 48
+#define RPMH_REGULATOR_LEVEL_LOW_SVS 64
+#define RPMH_REGULATOR_LEVEL_SVS 128
+#define RPMH_REGULATOR_LEVEL_SVS_L1 192
+#define RPMH_REGULATOR_LEVEL_NOM 256
+#define RPMH_REGULATOR_LEVEL_NOM_L1 320
+#define RPMH_REGULATOR_LEVEL_NOM_L2 336
+#define RPMH_REGULATOR_LEVEL_TURBO 384
+#define RPMH_REGULATOR_LEVEL_TURBO_L1 416
+
+/* MSM8996 Power Domain Indexes */
+#define MSM8996_VDDCX 0
+#define MSM8996_VDDCX_AO 1
+#define MSM8996_VDDCX_VFC 2
+#define MSM8996_VDDMX 3
+#define MSM8996_VDDMX_AO 4
+#define MSM8996_VDDSSCX 5
+#define MSM8996_VDDSSCX_VFC 6
+
+#endif
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2019-01-10 4:03 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-10 4:02 [PATCH v11 0/9] Add power domain driver for corners on msm8996/sdm845 Rajendra Nayak
2019-01-10 4:02 ` [PATCH v11 1/9] dt-bindings: opp: Introduce opp-level bindings Rajendra Nayak
2019-01-10 6:26 ` Viresh Kumar
2019-01-11 19:06 ` Stephen Boyd
2019-01-11 22:16 ` Doug Anderson
2019-01-15 19:59 ` Rob Herring
2019-01-10 4:02 ` [PATCH v11 2/9] OPP: Add support for parsing the 'opp-level' property Rajendra Nayak
2019-01-10 6:29 ` Viresh Kumar
2019-01-11 19:06 ` Stephen Boyd
2019-01-10 4:02 ` Rajendra Nayak [this message]
2019-01-10 4:02 ` [PATCH v11 4/9] soc: qcom: rpmpd: Add a Power domain driver to model corners Rajendra Nayak
2019-01-17 17:42 ` Guenter Roeck
2019-01-18 4:54 ` Rajendra Nayak
2019-01-10 4:02 ` [PATCH v11 5/9] soc: qcom: rpmpd: Add support for get/set performance state Rajendra Nayak
2019-01-10 4:02 ` [PATCH v11 6/9] arm64: dts: msm8996: Add rpmpd device node Rajendra Nayak
2019-01-10 4:02 ` [PATCH v11 7/9] soc: qcom: rpmhpd: Add RPMh power domain driver Rajendra Nayak
2019-01-10 4:02 ` [PATCH v11 8/9] arm64: dts: sdm845: Add rpmh powercontroller node Rajendra Nayak
2019-01-10 4:02 ` [PATCH v11 9/9] soc: qcom: rpmhpd: Mark mx as a parent for cx Rajendra Nayak
2019-01-10 6:33 ` [PATCH v11 0/9] Add power domain driver for corners on msm8996/sdm845 Viresh Kumar
2019-01-16 5:52 ` Bjorn Andersson
2019-01-16 15:18 ` Ulf Hansson
2019-01-17 4:24 ` Viresh Kumar
2019-01-17 15:03 ` Marc Gonzalez
2019-01-18 3:54 ` Rajendra Nayak
2019-01-18 10:17 ` Marc Gonzalez
2019-01-21 9:20 ` Rajendra Nayak
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190110040209.6028-4-rnayak@codeaurora.org \
--to=rnayak@codeaurora.org \
--cc=andy.gross@linaro.org \
--cc=collinsd@codeaurora.org \
--cc=devicetree@vger.kernel.org \
--cc=henryc.chen@mediatek.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mka@chromium.org \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=ulf.hansson@linaro.org \
--cc=viresh.kumar@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).