From: Rob Herring <robh@kernel.org>
To: Sowjanya Komatineni <skomatineni@nvidia.com>
Cc: mark.rutland@arm.com, mperttunen@nvidia.com,
chunyan.zhang@unisoc.com, thierry.reding@gmail.com,
jonathanh@nvidia.com, adrian.hunter@intel.com,
ulf.hansson@linaro.org, anrao@nvidia.com,
devicetree@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org
Subject: Re: [PATCH V8 1/3] dt-bindings: mmc: tegra: Add supports-cqe property
Date: Tue, 15 Jan 2019 14:02:09 -0600 [thread overview]
Message-ID: <20190115200209.GA8473@bogus> (raw)
In-Reply-To: <1547176135-2470-1-git-send-email-skomatineni@nvidia.com>
On Thu, Jan 10, 2019 at 07:08:53PM -0800, Sowjanya Komatineni wrote:
> Add supports-cqe optional property for Tegra SDMMC.
>
> Tegra186 and Tegra194 supports HW Command queue only
> on SDMMC4 controller. This property is used to identify
> command queue support controller in the tegra sdhci driver.
>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
> ---
> Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
> index 32b4b4e41923..fb14c2c8d7ee 100644
> --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
> +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
> @@ -72,6 +72,10 @@ Optional properties for Tegra210 and Tegra186:
> - nvidia,default-trim : Specify the default outbound clock trimmer
> value.
> - nvidia,dqs-trim : Specify DQS trim value for HS400 timing
> +- supports-cqe : The presence of this property indicates that the
> + corresponding controller supports HW command queue feature.
> + Tegra186 and Tegra194 has 4 SDMMC Controllers and only SDMMC4
> + controller supports HW Command Queue with eMMC device.
Don't SDHCI capability bits do this? If not, this should probably be
common.
Rob
next prev parent reply other threads:[~2019-01-15 20:02 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-11 3:08 [PATCH V8 1/3] dt-bindings: mmc: tegra: Add supports-cqe property Sowjanya Komatineni
2019-01-11 3:08 ` [PATCH V8 2/3] arm64: dts: tegra: Add CQE Support for SDMMC4 Sowjanya Komatineni
2019-01-11 3:08 ` [PATCH V8 3/3] mmc: tegra: HW Command Queue Support for Tegra SDMMC Sowjanya Komatineni
2019-01-15 20:02 ` Rob Herring [this message]
2019-01-15 20:06 ` [PATCH V8 1/3] dt-bindings: mmc: tegra: Add supports-cqe property Sowjanya Komatineni
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190115200209.GA8473@bogus \
--to=robh@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=anrao@nvidia.com \
--cc=chunyan.zhang@unisoc.com \
--cc=devicetree@vger.kernel.org \
--cc=jonathanh@nvidia.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mperttunen@nvidia.com \
--cc=skomatineni@nvidia.com \
--cc=thierry.reding@gmail.com \
--cc=ulf.hansson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).