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From: Lubomir Rintel <>
To: Michael Turquette <>,
	Stephen Boyd <>
	Lubomir Rintel <>,
Subject: [PATCH] clk: mmp2: avoid disabling the SP clock when unused
Date: Wed, 16 Jan 2019 10:35:05 +0100
Message-ID: <> (raw)

There could be vital functionality running on the SP PJ1 core it can not be
restarted just by turning the clock back on.

On the OLPC laptop, the keyboard controller code runs there. It
wouldn't be possible to load the driver for it as a module if the clock
is disabled on boot.

Cc: # v4.18+
Fixes: commit fc27c2394d96 ("clk: mmp2: add SP clock")
Signed-off-by: Lubomir Rintel <>
 drivers/clk/mmp/clk-of-mmp2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c
index f2a1c9bbaa63..3e33f1295f59 100644
--- a/drivers/clk/mmp/clk-of-mmp2.c
+++ b/drivers/clk/mmp/clk-of-mmp2.c
@@ -246,7 +246,7 @@ static struct mmp_param_gate_clk apmu_gate_clks[] = {
 	{MMP2_CLK_CCIC1, "ccic1_clk", "ccic1_mix_clk", CLK_SET_RATE_PARENT, APMU_CCIC1, 0x1b, 0x1b, 0x0, 0, &ccic1_lock},
 	{MMP2_CLK_CCIC1_PHY, "ccic1_phy_clk", "ccic1_mix_clk", CLK_SET_RATE_PARENT, APMU_CCIC1, 0x24, 0x24, 0x0, 0, &ccic1_lock},
 	{MMP2_CLK_CCIC1_SPHY, "ccic1_sphy_clk", "ccic1_sphy_div", CLK_SET_RATE_PARENT, APMU_CCIC1, 0x300, 0x300, 0x0, 0, &ccic1_lock},
-	{MMP2_CLK_SP, "sp_clk", NULL, CLK_SET_RATE_PARENT, APMU_SP, 0x1b, 0x1b, 0x0, 0, &sp_lock},
+	{MMP2_CLK_SP, "sp_clk", NULL, CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, APMU_SP, 0x1b, 0x1b, 0x0, 0, &sp_lock},
 static void mmp2_axi_periph_clk_init(struct mmp2_clk_unit *pxa_unit)

             reply index

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-16  9:35 Lubomir Rintel [this message]
2019-01-16 16:37 ` Stephen Boyd
2019-01-16 17:26   ` Lubomir Rintel
2019-01-16 23:29     ` Stephen Boyd
2019-01-17  9:47       ` Lubomir Rintel
2019-01-18 17:31         ` Stephen Boyd

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