From: Daniel Baluta <daniel.baluta@nxp.com>
To: "shawnguo@kernel.org" <shawnguo@kernel.org>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
"kernel@pengutronix.de" <kernel@pengutronix.de>,
Fabio Estevam <fabio.estevam@nxp.com>,
dl-linux-imx <linux-imx@nxp.com>,
Anson Huang <anson.huang@nxp.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"S.j. Wang" <shengjiu.wang@nxp.com>,
Daniel Baluta <daniel.baluta@nxp.com>
Subject: [PATCH v2] arm64: dts: imx8qxp: Fix MU4_INT number
Date: Wed, 16 Jan 2019 13:21:36 +0000 [thread overview]
Message-ID: <20190116132124.4383-1-daniel.baluta@nxp.com> (raw)
MU4_INT correct number is 180, while 179 is for MU3_INT.
Fixes: 3d91ba65fec ("arm64: dts: imx: add imx8qxp support")
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
---
Changes since v1:
- fix subject prefix 'arm64: dts: imx' -> 'arm64: dts: imx8qxp'
- added 'Fixes' tag
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index bb877cf25edc..4c3dd95ed488 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -350,7 +350,7 @@
lsio_mu4: mailbox@5d1f0000 {
compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
reg = <0x5d1f0000 0x10000>;
- interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <0>;
status = "disabled";
};
--
2.17.1
next reply other threads:[~2019-01-16 13:21 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-16 13:21 Daniel Baluta [this message]
2019-01-16 13:25 ` [PATCH v2] arm64: dts: imx8qxp: Fix MU4_INT number Shawn Guo
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