From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 03444C43387 for ; Thu, 17 Jan 2019 09:42:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C5BD52054F for ; Thu, 17 Jan 2019 09:41:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="ZWgtlMpw" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728582AbfAQJl6 (ORCPT ); Thu, 17 Jan 2019 04:41:58 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:40466 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726171AbfAQJl5 (ORCPT ); Thu, 17 Jan 2019 04:41:57 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x0H9fj4L065500; Thu, 17 Jan 2019 03:41:45 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1547718105; bh=7uh7qwRiIROTU6HHFhauwCwwz5zVjtyMcOELZdgUxzg=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ZWgtlMpwQ64AZtN0CF5QamZZXt3uu3/2DPO4fHJHaHf5PVcHf6GNDVFf/FeUoYJ/V zbo/FnSlcI11gU/UQQHxwKDVzMAfLeXUe0LphuKRaHNbj0fxVAhKLwOjpb7wkfPLvv aR3n5XyST+9b7A5hWBBZydI0oPYiZmfg/4KiJdKs= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x0H9fjYf042252 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 17 Jan 2019 03:41:45 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1591.10; Thu, 17 Jan 2019 03:41:45 -0600 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1591.10 via Frontend Transport; Thu, 17 Jan 2019 03:41:45 -0600 Received: from a0230074-OptiPlex-7010.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id x0H9fdIk016863; Thu, 17 Jan 2019 03:41:43 -0600 From: Faiz Abbas To: , , CC: , , , , Subject: [PATCH v3 1/2] arm64: dts: ti: k3-am654: Add Support for eMMC host controller Date: Thu, 17 Jan 2019 15:14:23 +0530 Message-ID: <20190117094424.7683-2-faiz_abbas@ti.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190117094424.7683-1-faiz_abbas@ti.com> References: <20190117094424.7683-1-faiz_abbas@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for the Secure Digital Host Controller Interface (SDHCI) present on TI's AM654 SOCs. It is compatible with eMMC5.1 Host Specifications. Enable only upto HS200 speed mode. Signed-off-by: Faiz Abbas Acked-by: Nishanth Menon --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi index 272cf8fc8d30..9338315b0ca9 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -191,4 +191,18 @@ #address-cells = <1>; #size-cells = <0>; }; + + sdhci0: sdhci@4f80000 { + compatible = "ti,am654-sdhci-5.1"; + reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; + power-domains = <&k3_pds 47>; + clocks = <&k3_clks 47 0>, <&k3_clks 47 1>; + clock-names = "clk_ahb", "clk_xin"; + interrupts = ; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + ti,otap-del-sel = <0x2>; + ti,trm-icp = <0x8>; + dma-coherent; + }; }; -- 2.19.2