From: Will Deacon <will.deacon@arm.com>
To: Vivek Gautam <vivek.gautam@codeaurora.org>
Cc: robin.murphy@arm.com, joro@8bytes.org,
iommu@lists.linux-foundation.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
tfiga@chromium.org
Subject: Re: [PATCH 2/2] iommu/arm-smmu: Add support for non-coherent page table mappings
Date: Sun, 20 Jan 2019 00:01:18 +0000 [thread overview]
Message-ID: <20190120000117.GH26876@brain-police> (raw)
In-Reply-To: <20190117092718.1396-3-vivek.gautam@codeaurora.org>
On Thu, Jan 17, 2019 at 02:57:18PM +0530, Vivek Gautam wrote:
> Adding a device tree option for arm smmu to enable non-cacheable
> memory for page tables.
> We already enable a smmu feature for coherent walk based on
> whether the smmu device is dma-coherent or not. Have an option
> to enable non-cacheable page table memory to force set it for
> particular smmu devices.
Hmm, I must be missing something here. What is the difference between this
new property, and simply omitting dma-coherent on the SMMU?
Will
next prev parent reply other threads:[~2019-01-20 0:01 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-17 9:27 [PATCH 0/2] iommu/arm: Add support for non-coherent page tables Vivek Gautam
2019-01-17 9:27 ` [PATCH 1/2] iommu/io-pgtable-arm: " Vivek Gautam
2019-01-21 13:12 ` Robin Murphy
2019-01-28 12:20 ` Vivek Gautam
2019-01-17 9:27 ` [PATCH 2/2] iommu/arm-smmu: Add support for non-coherent page table mappings Vivek Gautam
2019-01-20 0:01 ` Will Deacon [this message]
2019-01-21 6:05 ` Vivek Gautam
2019-01-22 5:43 ` Will Deacon
2019-01-29 10:43 ` Vivek Gautam
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