From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 53F2BC282E9 for ; Mon, 21 Jan 2019 08:07:40 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 28CEB2084A for ; Mon, 21 Jan 2019 08:07:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728970AbfAUIHO (ORCPT ); Mon, 21 Jan 2019 03:07:14 -0500 Received: from inva021.nxp.com ([92.121.34.21]:51350 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729883AbfAUIFy (ORCPT ); Mon, 21 Jan 2019 03:05:54 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 11F0E2000D4; Mon, 21 Jan 2019 04:18:39 +0100 (CET) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 86D39200064; Mon, 21 Jan 2019 04:18:33 +0100 (CET) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 89D81402D9; Mon, 21 Jan 2019 11:18:26 +0800 (SGT) From: Yinbo Zhu To: Alan Stern Cc: yinbo.zhu@nxp.com, xiaobo.xie@nxp.com, jerry.huang@nxp.com, ran.wang_1@nxp.com, Greg Kroah-Hartman , Ramneek Mehresh , Nikhil Badola , Suresh Gupta , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Suresh Gupta Subject: [PATCH v1 2/6] usb: phy: Workaround for USB erratum-A005728 Date: Mon, 21 Jan 2019 11:13:00 +0800 Message-Id: <20190121031304.31161-2-yinbo.zhu@nxp.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190121031304.31161-1-yinbo.zhu@nxp.com> References: <20190121031304.31161-1-yinbo.zhu@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Suresh Gupta PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even if PHY is providing valid clock. Workaround for this involves resetting of PHY and check PHY_CLK_VALID bit multiple times. If PHY_CLK_VALID bit is still not set even after 5 retries, it would be safe to deaclare that PHY clock is not available. This erratum is applicable for USBDR less then ver 2.4. Signed-off-by: Suresh Gupta Signed-off-by: yinbo.zhu --- drivers/usb/host/ehci-fsl.c | 37 ++++++++++++++++++++++++++----------- drivers/usb/host/ehci-fsl.h | 3 +++ 2 files changed, 29 insertions(+), 11 deletions(-) diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 71c4661..a28ec1e 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -176,6 +176,17 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev) return retval; } +static bool usb_phy_clk_valid(struct usb_hcd *hcd) +{ + void __iomem *non_ehci = hcd->regs; + bool ret = true; + + if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID)) + ret = false; + + return ret; +} + static int ehci_fsl_setup_phy(struct usb_hcd *hcd, enum fsl_usb2_phy_modes phy_mode, unsigned int port_offset) @@ -214,6 +225,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, /* fall through */ case FSL_USB2_PHY_UTMI: case FSL_USB2_PHY_UTMI_DUAL: + /* PHY_CLK_VALID bit is de-featured from all controller + * versions below 2.4 and is to be checked only for + * internal UTMI phy + */ + if (pdata->controller_ver > FSL_USB_VER_2_4 && + pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) { + pr_err("fsl-ehci: USB PHY clock invalid\n"); + return -EINVAL; + } + if (pdata->have_sysif_regs && pdata->controller_ver) { /* controller version 1.6 or above */ clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL, @@ -232,17 +253,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd, break; } - /* - * check PHY_CLK_VALID to determine phy clock presence before writing - * to portsc - */ - if (pdata->check_phy_clk_valid) { - if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & - PHY_CLK_VALID)) { - dev_warn(hcd->self.controller, - "USB PHY clock invalid\n"); - return -EINVAL; - } + if (pdata->have_sysif_regs && + pdata->controller_ver > FSL_USB_VER_1_6 && + !usb_phy_clk_valid(hcd)) { + dev_warn(hcd->self.controller, "USB PHY clock invalid\n"); + return -EINVAL; } ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h index cbc4220..9d18c6e 100644 --- a/drivers/usb/host/ehci-fsl.h +++ b/drivers/usb/host/ehci-fsl.h @@ -50,4 +50,7 @@ #define UTMI_PHY_EN (1<<9) #define ULPI_PHY_CLK_SEL (1<<10) #define PHY_CLK_VALID (1<<17) + +/* Retry count for checking UTMI PHY CLK validity */ +#define UTMI_PHY_CLK_VALID_CHK_RETRY 5 #endif /* _EHCI_FSL_H */ -- 1.7.1