From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_NEOMUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80E67C282C3 for ; Tue, 22 Jan 2019 19:10:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 50FF320856 for ; Tue, 22 Jan 2019 19:10:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=armlinux.org.uk header.i=@armlinux.org.uk header.b="nXYrpnC3" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726423AbfAVTKr (ORCPT ); Tue, 22 Jan 2019 14:10:47 -0500 Received: from pandora.armlinux.org.uk ([78.32.30.218]:41046 "EHLO pandora.armlinux.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726191AbfAVTKq (ORCPT ); Tue, 22 Jan 2019 14:10:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=armlinux.org.uk; s=pandora-2014; h=Sender:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=haCZ038HC8d6Fz4YWBQm/0Fr+4eV1xPEwWb6lWLRcsI=; b=nXYrpnC3dOGqX2SGINDoyT8Qd j+yJfZxi2hoxZ28TNkDrGnnvs8xYEgULDm+R697zrhskymO3t4sEjHudkfIXHFF94NjOO7ITP+blF i8ySyJQqHbfrqJMumq6ZxTLnAtLBMUIDT0GJDIvJhJVdTzGP3M2mgl0GJt0SgUjILxOrg=; Received: from e5254000004ec.dyn.armlinux.org.uk ([2002:4e20:1eda:1:5054:ff:fe00:4ec]:46188 helo=shell.armlinux.org.uk) by pandora.armlinux.org.uk with esmtpsa (TLSv1.2:ECDHE-RSA-AES256-GCM-SHA384:256) (Exim 4.90_1) (envelope-from ) id 1gm1RY-00066Z-7N; Tue, 22 Jan 2019 19:10:40 +0000 Received: from linux by shell.armlinux.org.uk with local (Exim 4.89) (envelope-from ) id 1gm1RX-0001wW-KW; Tue, 22 Jan 2019 19:10:39 +0000 Date: Tue, 22 Jan 2019 19:10:39 +0000 From: Russell King - ARM Linux admin To: Lubomir Rintel Cc: David Airlie , Daniel Vetter , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] drm/armada: add mmp2 support Message-ID: <20190122191039.ls6dgt2qaxympdnb@e5254000004ec.dyn.armlinux.org.uk> References: <20190121060349.549797-1-lkundrak@v3.sk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190121060349.549797-1-lkundrak@v3.sk> User-Agent: NeoMutt/20170113 (1.7.2) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 21, 2019 at 07:03:49AM +0100, Lubomir Rintel wrote: > Heavily based on the Armada 510 (Dove) support. Like with 510 support, this > also just supports a single source clock -- the "Display 1" clock as > generated by the APMU. This one was chosen because the OLPC XO 1.75 laptop > uses it for its internal panel. > > If anyone uses this to drive a MIPI or HDMI encoder, they may want to > extend this to choose a different source for the pixel clock -- it should > be a reasonably straightforward thing to do. > > The data sheet is not available, but James Cameron of OLPC kindly > provided some details about the LCD_SCLK_DIV register. > > Link: https://lists.freedesktop.org/archives/dri-devel/2018-December/201021.html > Signed-off-by: Lubomir Rintel > --- > drivers/gpu/drm/armada/Makefile | 1 + > drivers/gpu/drm/armada/armada_610.c | 93 ++++++++++++++++++++++++++++ > drivers/gpu/drm/armada/armada_crtc.c | 4 ++ > drivers/gpu/drm/armada/armada_drm.h | 1 + > drivers/gpu/drm/armada/armada_hw.h | 10 +++ > 5 files changed, 109 insertions(+) > create mode 100644 drivers/gpu/drm/armada/armada_610.c > > diff --git a/drivers/gpu/drm/armada/Makefile b/drivers/gpu/drm/armada/Makefile > index 9bc3c3213724..5bbf86324cda 100644 > --- a/drivers/gpu/drm/armada/Makefile > +++ b/drivers/gpu/drm/armada/Makefile > @@ -2,6 +2,7 @@ > armada-y := armada_crtc.o armada_drv.o armada_fb.o armada_fbdev.o \ > armada_gem.o armada_overlay.o armada_plane.o armada_trace.o > armada-y += armada_510.o > +armada-y += armada_610.o > armada-$(CONFIG_DEBUG_FS) += armada_debugfs.o > > obj-$(CONFIG_DRM_ARMADA) := armada.o > diff --git a/drivers/gpu/drm/armada/armada_610.c b/drivers/gpu/drm/armada/armada_610.c > new file mode 100644 > index 000000000000..278b204038ea > --- /dev/null > +++ b/drivers/gpu/drm/armada/armada_610.c > @@ -0,0 +1,93 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (C) 2012 Russell King > + * Copyright (C) 2018,2019 Lubomir Rintel > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * Armada MMP2 variant support > + */ > +#include > +#include > +#include > +#include "armada_crtc.h" > +#include "armada_drm.h" > +#include "armada_hw.h" > + > +static int armada610_crtc_init(struct armada_crtc *dcrtc, struct device *dev) > +{ > + struct clk *clk; > + > + clk = devm_clk_get(dev, "disp0"); > + if (IS_ERR(clk)) > + return PTR_ERR(clk) == -ENOENT ? -EPROBE_DEFER : PTR_ERR(clk); > + > + dcrtc->extclk[0] = clk; I've been reworking the clocking support for Armada, you can find the current code in my git tree's drm-armada-devel branch (as mentioned in MAINTAINERS). You'll need to update to that before I can apply this. The clocks are named in Dove's TRM as: 0 = AXIbus: Select AXI bus clock as pixel clock source. 1 = EXT_REF_CLK0: LCD_EXT_REF_CLK[0] 2 = PLLDivider: Select PLL divider input clock as pixel clock source. 3 = EXT_REF_CLK1: LCD_EXT_REF_CLK[1] So I chose to use these neumonics in the Armada 510. Please can we keep to naming the clock inputs as per documented names please? Also, have a look at how Armada 510 gets its clocks from DT - note that the array they're placed in is ordered by priority (iow, if we have an external clock, we use that in preference to the more restricted axibus and plldivider clocks.) Thanks. -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up According to speedtest.net: 11.9Mbps down 500kbps up