From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E31DC282C8 for ; Mon, 28 Jan 2019 16:03:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3F67C2175B for ; Mon, 28 Jan 2019 16:03:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1548691418; bh=TEkgNeXJVm2BYY9sKTJNoUkPb7TZeze7t3q2S7JhTZI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=rmTb6fd2zkfJ3nPhsTti9bDjFajnnsCEdNG5uWbC16gMU7RZCh90l3r939MOSDIJm 6B0JMpHF9V0qxhlutZsarwu4R1sPBlVohcFugHpFlO5Uw8x0YkuYLd/c4BIhW7WeYW NgCwUWnwtNHNT3jbNFvIAv2E5H9ojAnE3Xh30B2E= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731413AbfA1QDb (ORCPT ); Mon, 28 Jan 2019 11:03:31 -0500 Received: from mail.kernel.org ([198.145.29.99]:48816 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728431AbfA1QD3 (ORCPT ); Mon, 28 Jan 2019 11:03:29 -0500 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B13792175B; Mon, 28 Jan 2019 16:03:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1548691408; bh=TEkgNeXJVm2BYY9sKTJNoUkPb7TZeze7t3q2S7JhTZI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=wzbIkT2abSX5LelxNKLydLjeklTBQ0L6hMW4Rvu2NWfE9I4ym9g/oGXCYFCdmLpNG OG49DUSVoC8plbitK56J+afYAxs2VX+yr/4vK46NzmOCCsriigHqqzaU6fGWOW5OgE JOuonP6ROGFaaXiH4xt+YaZVGKYcOzCq0YDXUKu0= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Will Deacon , Sasha Levin Subject: [PATCH AUTOSEL 4.19 085/258] arm64: io: Ensure value passed to __iormb() is held in a 64-bit register Date: Mon, 28 Jan 2019 10:56:31 -0500 Message-Id: <20190128155924.51521-85-sashal@kernel.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190128155924.51521-1-sashal@kernel.org> References: <20190128155924.51521-1-sashal@kernel.org> MIME-Version: 1.0 X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Will Deacon [ Upstream commit 1b57ec8c75279b873639eb44a215479236f93481 ] As of commit 6460d3201471 ("arm64: io: Ensure calls to delay routines are ordered against prior readX()"), MMIO reads smaller than 64 bits fail to compile under clang because we end up mixing 32-bit and 64-bit register operands for the same data processing instruction: ./include/asm-generic/io.h:695:9: warning: value size does not match register size specified by the constraint and modifier [-Wasm-operand-widths] return readb(addr); ^ ./arch/arm64/include/asm/io.h:147:58: note: expanded from macro 'readb' ^ ./include/asm-generic/io.h:695:9: note: use constraint modifier "w" ./arch/arm64/include/asm/io.h:147:50: note: expanded from macro 'readb' ^ ./arch/arm64/include/asm/io.h:118:24: note: expanded from macro '__iormb' asm volatile("eor %0, %1, %1\n" \ ^ Fix the build by casting the macro argument to 'unsigned long' when used as an input to the inline asm. Reported-by: Nick Desaulniers Reported-by: Nathan Chancellor Signed-off-by: Will Deacon Signed-off-by: Sasha Levin --- arch/arm64/include/asm/io.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index b2bc7dbc1fa6..49bb9a020a09 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h @@ -119,7 +119,8 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) */ \ asm volatile("eor %0, %1, %1\n" \ "cbnz %0, ." \ - : "=r" (tmp) : "r" (v) : "memory"); \ + : "=r" (tmp) : "r" ((unsigned long)(v)) \ + : "memory"); \ }) #define __iowmb() wmb() -- 2.19.1