From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: linux-kernel@vger.kernel.org
Cc: Michael Jamet <michael.jamet@intel.com>,
Yehezkel Bernat <YehezkelShB@gmail.com>,
Andreas Noever <andreas.noever@gmail.com>,
Lukas Wunner <lukas@wunner.de>,
"David S . Miller" <davem@davemloft.net>,
Mika Westerberg <mika.westerberg@linux.intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
netdev@vger.kernel.org
Subject: [PATCH 06/28] thunderbolt: Configure lanes when switch is initialized
Date: Tue, 29 Jan 2019 18:01:21 +0300 [thread overview]
Message-ID: <20190129150143.12681-7-mika.westerberg@linux.intel.com> (raw)
In-Reply-To: <20190129150143.12681-1-mika.westerberg@linux.intel.com>
Thunderbolt 2 devices and beyond need to have additional bits set in
link controller specific registers. This includes two bits in LC_SX_CTRL
that tell the link controller which lane is connected and whether it is
upstream facing or not.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
drivers/thunderbolt/lc.c | 114 ++++++++++++++++++++++++++++++++++
drivers/thunderbolt/switch.c | 9 +++
drivers/thunderbolt/tb.h | 2 +
drivers/thunderbolt/tb_regs.h | 11 ++++
4 files changed, 136 insertions(+)
diff --git a/drivers/thunderbolt/lc.c b/drivers/thunderbolt/lc.c
index 2134a55ed837..a5dddf176546 100644
--- a/drivers/thunderbolt/lc.c
+++ b/drivers/thunderbolt/lc.c
@@ -19,3 +19,117 @@ int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid)
return -EINVAL;
return tb_sw_read(sw, uuid, TB_CFG_SWITCH, sw->cap_lc + TB_LC_FUSE, 4);
}
+
+static int read_lc_desc(struct tb_switch *sw, u32 *desc)
+{
+ if (!sw->cap_lc)
+ return -EINVAL;
+ return tb_sw_read(sw, desc, TB_CFG_SWITCH, sw->cap_lc + TB_LC_DESC, 1);
+}
+
+static int find_port_lc_cap(struct tb_port *port)
+{
+ struct tb_switch *sw = port->sw;
+ int start, phys, ret, size;
+ u32 desc;
+
+ ret = read_lc_desc(sw, &desc);
+ if (ret)
+ return ret;
+
+ /* Start of port LC registers */
+ start = (desc & TB_LC_DESC_SIZE_MASK) >> TB_LC_DESC_SIZE_SHIFT;
+ size = (desc & TB_LC_DESC_PORT_SIZE_MASK) >> TB_LC_DESC_PORT_SIZE_SHIFT;
+ phys = tb_phy_port_from_link(port->port);
+
+ return sw->cap_lc + start + phys * size;
+}
+
+static int tb_lc_configure_lane(struct tb_port *port, bool configure)
+{
+ bool upstream = tb_is_upstream_port(port);
+ struct tb_switch *sw = port->sw;
+ u32 ctrl, lane;
+ int cap, ret;
+
+ if (sw->generation < 2)
+ return 0;
+
+ cap = find_port_lc_cap(port);
+ if (cap < 0)
+ return cap;
+
+ ret = tb_sw_read(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1);
+ if (ret)
+ return ret;
+
+ /* Resolve correct lane */
+ if (port->port % 2)
+ lane = TB_LC_SX_CTRL_L1C;
+ else
+ lane = TB_LC_SX_CTRL_L2C;
+
+ if (configure) {
+ ctrl |= lane;
+ if (upstream)
+ ctrl |= TB_LC_SX_CTRL_UPSTREAM;
+ } else {
+ ctrl &= ~lane;
+ if (upstream)
+ ctrl &= ~TB_LC_SX_CTRL_UPSTREAM;
+ }
+
+ return tb_sw_write(sw, &ctrl, TB_CFG_SWITCH, cap + TB_LC_SX_CTRL, 1);
+}
+
+/**
+ * tb_lc_configure_link() - Let LC know about configured link
+ * @sw: Switch that is being added
+ *
+ * Informs LC of both parent switch and @sw that there is established
+ * link between the two.
+ */
+int tb_lc_configure_link(struct tb_switch *sw)
+{
+ struct tb_port *up, *down;
+ int ret;
+
+ if (!sw->config.enabled || !tb_route(sw))
+ return 0;
+
+ up = tb_upstream_port(sw);
+ down = tb_port_at(tb_route(sw), tb_to_switch(sw->dev.parent));
+
+ /* Configure parent link toward this switch */
+ ret = tb_lc_configure_lane(down, true);
+ if (ret)
+ return ret;
+
+ /* Configure upstream link from this switch to the parent */
+ ret = tb_lc_configure_lane(up, true);
+ if (ret)
+ tb_lc_configure_lane(down, false);
+
+ return ret;
+}
+
+/**
+ * tb_lc_unconfigure_link() - Let LC know about unconfigured link
+ * @sw: Switch to unconfigure
+ *
+ * Informs LC of both parent switch and @sw that the link between the
+ * two does not exist anymore.
+ */
+void tb_lc_unconfigure_link(struct tb_switch *sw)
+{
+ struct tb_port *up, *down;
+
+ if (sw->is_unplugged || !sw->config.enabled || !tb_route(sw))
+ return;
+
+ up = tb_upstream_port(sw);
+ down = tb_port_at(tb_route(sw), tb_to_switch(sw->dev.parent));
+
+ tb_lc_configure_lane(up, false);
+ tb_lc_configure_lane(down, false);
+}
diff --git a/drivers/thunderbolt/switch.c b/drivers/thunderbolt/switch.c
index bd96eebd8248..760332f57b5c 100644
--- a/drivers/thunderbolt/switch.c
+++ b/drivers/thunderbolt/switch.c
@@ -1301,6 +1301,10 @@ int tb_switch_configure(struct tb_switch *sw)
if (ret)
return ret;
+ ret = tb_lc_configure_link(sw);
+ if (ret)
+ return ret;
+
return tb_plug_events_active(sw, true);
}
@@ -1504,6 +1508,7 @@ void tb_switch_remove(struct tb_switch *sw)
if (!sw->is_unplugged)
tb_plug_events_active(sw, false);
+ tb_lc_unconfigure_link(sw);
tb_switch_nvm_remove(sw);
@@ -1563,6 +1568,10 @@ int tb_switch_resume(struct tb_switch *sw)
if (err)
return err;
+ err = tb_lc_configure_link(sw);
+ if (err)
+ return err;
+
err = tb_plug_events_active(sw, true);
if (err)
return err;
diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h
index 530464b25dcb..e61c2409021d 100644
--- a/drivers/thunderbolt/tb.h
+++ b/drivers/thunderbolt/tb.h
@@ -451,6 +451,8 @@ int tb_drom_read(struct tb_switch *sw);
int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
+int tb_lc_configure_link(struct tb_switch *sw);
+void tb_lc_unconfigure_link(struct tb_switch *sw);
static inline int tb_route_length(u64 route)
{
diff --git a/drivers/thunderbolt/tb_regs.h b/drivers/thunderbolt/tb_regs.h
index 4895ae9f0b40..e0f867dad5cf 100644
--- a/drivers/thunderbolt/tb_regs.h
+++ b/drivers/thunderbolt/tb_regs.h
@@ -238,6 +238,17 @@ struct tb_regs_hop {
} __packed;
/* Common link controller registers */
+#define TB_LC_DESC 0x02
+#define TB_LC_DESC_SIZE_SHIFT 8
+#define TB_LC_DESC_SIZE_MASK GENMASK(15, 8)
+#define TB_LC_DESC_PORT_SIZE_SHIFT 16
+#define TB_LC_DESC_PORT_SIZE_MASK GENMASK(27, 16)
#define TB_LC_FUSE 0x03
+/* Link controller registers */
+#define TB_LC_SX_CTRL 0x96
+#define TB_LC_SX_CTRL_L1C BIT(16)
+#define TB_LC_SX_CTRL_L2C BIT(20)
+#define TB_LC_SX_CTRL_UPSTREAM BIT(30)
+
#endif
--
2.20.1
next prev parent reply other threads:[~2019-01-29 15:05 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-29 15:01 [PATCH 00/28] thunderbolt: Software connection manager improvements Mika Westerberg
2019-01-29 15:01 ` [PATCH 01/28] net: thunderbolt: Unregister ThunderboltIP protocol handler when suspending Mika Westerberg
2019-01-29 18:10 ` David Miller
2019-01-29 15:01 ` [PATCH 02/28] thunderbolt: Do not allocate switch if depth is greater than 6 Mika Westerberg
2019-01-29 15:01 ` [PATCH 03/28] thunderbolt: Enable TMU access when accessing port space on legacy devices Mika Westerberg
2019-01-29 21:58 ` Lukas Wunner
2019-01-30 9:37 ` Mika Westerberg
2019-01-31 8:26 ` Lukas Wunner
2019-01-31 8:53 ` Mika Westerberg
2019-01-29 15:01 ` [PATCH 04/28] thunderbolt: Add dummy read after port capability list walk on Light Ridge Mika Westerberg
2019-01-29 15:01 ` [PATCH 05/28] thunderbolt: Move LC specific functionality into a separate file Mika Westerberg
2019-01-29 15:01 ` Mika Westerberg [this message]
2019-01-29 15:01 ` [PATCH 07/28] thunderbolt: Set sleep bit when suspending switch Mika Westerberg
2019-01-29 15:01 ` [PATCH 08/28] thunderbolt: Properly disable path Mika Westerberg
2019-01-29 15:01 ` [PATCH 09/28] thunderbolt: Cache adapter specific capability offset into struct port Mika Westerberg
2019-01-31 9:23 ` Lukas Wunner
2019-01-31 9:37 ` Mika Westerberg
2019-01-29 15:01 ` [PATCH 10/28] thunderbolt: Rename tunnel_pci to tunnel Mika Westerberg
2019-01-29 15:01 ` [PATCH 11/28] thunderbolt: Generalize tunnel creation functionality Mika Westerberg
2019-01-29 15:01 ` [PATCH 12/28] thunderbolt: Add functions for allocating and releasing hop IDs Mika Westerberg
2019-01-29 15:01 ` [PATCH 13/28] thunderbolt: Add helper function to iterate from one port to another Mika Westerberg
2019-01-29 15:01 ` [PATCH 14/28] thunderbolt: Extend tunnel creation to more than 2 adjacent switches Mika Westerberg
2019-01-29 15:01 ` [PATCH 15/28] thunderbolt: Deactivate all paths before restarting them Mika Westerberg
2019-01-29 15:01 ` [PATCH 16/28] thunderbolt: Discover preboot PCIe paths the boot firmware established Mika Westerberg
2019-01-29 15:01 ` [PATCH 17/28] thunderbolt: Add support for full PCIe daisy chains Mika Westerberg
2019-01-29 15:01 ` [PATCH 18/28] thunderbolt: Scan only valid NULL adapter ports in hotplug Mika Westerberg
2019-01-29 15:01 ` [PATCH 19/28] thunderbolt: Generalize port finding routines to support all port types Mika Westerberg
2019-01-29 15:01 ` [PATCH 20/28] thunderbolt: Rework NFC credits handling Mika Westerberg
2019-01-29 15:01 ` [PATCH 21/28] thunderbolt: Add support for Display Port tunnels Mika Westerberg
2019-01-29 15:01 ` [PATCH 22/28] thunderbolt: Run tb_xdp_handle_request() in system workqueue Mika Westerberg
2019-01-29 15:01 ` [PATCH 23/28] thunderbolt: Add XDomain UUID exchange support Mika Westerberg
2019-01-29 15:01 ` [PATCH 24/28] thunderbolt: Add support for DMA tunnels Mika Westerberg
2019-01-29 15:01 ` [PATCH 25/28] thunderbolt: Make tb_switch_alloc() return ERR_PTR() Mika Westerberg
2019-01-29 15:01 ` [PATCH 26/28] thunderbolt: Add support for XDomain connections Mika Westerberg
2019-01-29 15:01 ` [PATCH 27/28] thunderbolt: Make rest of the logging to happen at debug level Mika Westerberg
2019-01-29 15:01 ` [PATCH 28/28] thunderbolt: Start firmware on Titan Ridge Apple systems Mika Westerberg
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