[v5 1/2] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list

[v5 1/2] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list

[Peng Ma]

Add lx2160a compatible to bindings documentation.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
changed for V5:
	- change the lxx2160a to lx2160a

 .../devicetree/bindings/ata/ahci-fsl-qoriq.txt     |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
index 7c3ca0e..9ecc019 100644
--- a/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
+++ b/Documentation/devicetree/bindings/ata/ahci-fsl-qoriq.txt
@@ -3,7 +3,7 @@ Binding for Freescale QorIQ AHCI SATA Controller
 Required properties:
   - reg: Physical base address and size of the controller's register area.
   - compatible: Compatibility string. Must be 'fsl,<chip>-ahci', where
-    chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a etc.
+    chip could be ls1021a, ls1043a, ls1046a, ls1088a, ls2080a, lx2160a, etc.
   - clocks: Input clock specifier. Refer to common clock bindings.
   - interrupts: Interrupt specifier. Refer to interrupt binding.
 
-- 
1.7.1

[v5 2/2] arm64: dts: lx2160a: add sata node support

[Peng Ma]

Add SATA device nodes for fsl-lx2160a and enable support
for QDS and RDB boards.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
---
changed for V5:
	- no change

 arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts |   16 +++++++
 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |   16 +++++++
 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi    |   44 +++++++++++++++++++++
 3 files changed, 76 insertions(+), 0 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
index 99a22ab..1a5acf6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
@@ -95,6 +95,22 @@
 	};
 };
 
+&sata0 {
+	status = "okay";
+};
+
+&sata1 {
+	status = "okay";
+};
+
+&sata2 {
+	status = "okay";
+};
+
+&sata3 {
+	status = "okay";
+};
+
 &uart0 {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 6481e5f..5b6799e 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -102,6 +102,22 @@
 	};
 };
 
+&sata0 {
+	status = "okay";
+};
+
+&sata1 {
+	status = "okay";
+};
+
+&sata2 {
+	status = "okay";
+};
+
+&sata3 {
+	status = "okay";
+};
+
 &uart0 {
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index a79f5c1..592034b 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -671,6 +671,50 @@
 			status = "disabled";
 		};
 
+		sata0: sata@3200000 {
+			compatible = "fsl,lx2160a-ahci";
+			reg = <0x0 0x3200000 0x0 0x10000>,
+			      <0x7 0x100520 0x0 0x4>;
+			reg-names = "ahci", "sata-ecc";
+			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clockgen 4 3>;
+			dma-coherent;
+			status = "disabled";
+		};
+
+		sata1: sata@3210000 {
+			compatible = "fsl,lx2160a-ahci";
+			reg = <0x0 0x3210000 0x0 0x10000>,
+			      <0x7 0x100520 0x0 0x4>;
+			reg-names = "ahci", "sata-ecc";
+			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clockgen 4 3>;
+			dma-coherent;
+			status = "disabled";
+		};
+
+		sata2: sata@3220000 {
+			compatible = "fsl,lx2160a-ahci";
+			reg = <0x0 0x3220000 0x0 0x10000>,
+			      <0x7 0x100520 0x0 0x4>;
+			reg-names = "ahci", "sata-ecc";
+			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clockgen 4 3>;
+			dma-coherent;
+			status = "disabled";
+		};
+
+		sata3: sata@3230000 {
+			compatible = "fsl,lx2160a-ahci";
+			reg = <0x0 0x3230000 0x0 0x10000>,
+			      <0x7 0x100520 0x0 0x4>;
+			reg-names = "ahci", "sata-ecc";
+			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clockgen 4 3>;
+			dma-coherent;
+			status = "disabled";
+		};
+
 		smmu: iommu@5000000 {
 			compatible = "arm,mmu-500";
 			reg = <0 0x5000000 0 0x800000>;
-- 
1.7.1

Re: [v5 1/2] dt-bindings: ahci-fsl-qoriq: add lx2160a chip name to the list

[Rob Herring]

On Fri, 25 Jan 2019 08:10:12 +0000, Peng Ma wrote:
> Add lx2160a compatible to bindings documentation.
> 
> Signed-off-by: Peng Ma <peng.ma@nxp.com>
> ---
> changed for V5:
> 	- change the lxx2160a to lx2160a
> 
>  .../devicetree/bindings/ata/ahci-fsl-qoriq.txt     |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [v5 2/2] arm64: dts: lx2160a: add sata node support

[Shawn Guo]

On Fri, Jan 25, 2019 at 08:10:13AM +0000, Peng Ma wrote:
> Add SATA device nodes for fsl-lx2160a and enable support
> for QDS and RDB boards.
> 
> Signed-off-by: Peng Ma <peng.ma@nxp.com>
> ---
> changed for V5:
> 	- no change
> 
>  arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts |   16 +++++++
>  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |   16 +++++++
>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi    |   44 +++++++++++++++++++++
>  3 files changed, 76 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> index 99a22ab..1a5acf6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> @@ -95,6 +95,22 @@
>  	};
>  };
>  
> +&sata0 {
> +	status = "okay";
> +};
> +
> +&sata1 {
> +	status = "okay";
> +};
> +
> +&sata2 {
> +	status = "okay";
> +};
> +
> +&sata3 {
> +	status = "okay";
> +};
> +
>  &uart0 {
>  	status = "okay";
>  };
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> index 6481e5f..5b6799e 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> @@ -102,6 +102,22 @@
>  	};
>  };
>  
> +&sata0 {
> +	status = "okay";
> +};
> +
> +&sata1 {
> +	status = "okay";
> +};
> +
> +&sata2 {
> +	status = "okay";
> +};
> +
> +&sata3 {
> +	status = "okay";
> +};
> +
>  &uart0 {
>  	status = "okay";
>  };
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index a79f5c1..592034b 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -671,6 +671,50 @@
>  			status = "disabled";
>  		};
>  
> +		sata0: sata@3200000 {
> +			compatible = "fsl,lx2160a-ahci";

Has the kernel driver been patched to probe the compatible?

Shawn

> +			reg = <0x0 0x3200000 0x0 0x10000>,
> +			      <0x7 0x100520 0x0 0x4>;
> +			reg-names = "ahci", "sata-ecc";
> +			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clockgen 4 3>;
> +			dma-coherent;
> +			status = "disabled";
> +		};
> +
> +		sata1: sata@3210000 {
> +			compatible = "fsl,lx2160a-ahci";
> +			reg = <0x0 0x3210000 0x0 0x10000>,
> +			      <0x7 0x100520 0x0 0x4>;
> +			reg-names = "ahci", "sata-ecc";
> +			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clockgen 4 3>;
> +			dma-coherent;
> +			status = "disabled";
> +		};
> +
> +		sata2: sata@3220000 {
> +			compatible = "fsl,lx2160a-ahci";
> +			reg = <0x0 0x3220000 0x0 0x10000>,
> +			      <0x7 0x100520 0x0 0x4>;
> +			reg-names = "ahci", "sata-ecc";
> +			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clockgen 4 3>;
> +			dma-coherent;
> +			status = "disabled";
> +		};
> +
> +		sata3: sata@3230000 {
> +			compatible = "fsl,lx2160a-ahci";
> +			reg = <0x0 0x3230000 0x0 0x10000>,
> +			      <0x7 0x100520 0x0 0x4>;
> +			reg-names = "ahci", "sata-ecc";
> +			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clockgen 4 3>;
> +			dma-coherent;
> +			status = "disabled";
> +		};
> +
>  		smmu: iommu@5000000 {
>  			compatible = "arm,mmu-500";
>  			reg = <0 0x5000000 0 0x800000>;
> -- 
> 1.7.1
> 

RE: [v5 2/2] arm64: dts: lx2160a: add sata node support

[Peng Ma]

>-----Original Message-----
>From: Shawn Guo <shawnguo@kernel.org>
>Sent: 2019年2月1日 14:30
>To: Peng Ma <peng.ma@nxp.com>
>Cc: axboe@kernel.dk; robh+dt@kernel.org; mark.rutland@arm.com; Leo Li
><leoyang.li@nxp.com>; linux-ide@vger.kernel.org; devicetree@vger.kernel.org;
>linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Andy Tang
><andy.tang@nxp.com>
>Subject: Re: [v5 2/2] arm64: dts: lx2160a: add sata node support
>
>On Fri, Jan 25, 2019 at 08:10:13AM +0000, Peng Ma wrote:
>> Add SATA device nodes for fsl-lx2160a and enable support for QDS and
>> RDB boards.
>>
>> Signed-off-by: Peng Ma <peng.ma@nxp.com>
>> ---
>> changed for V5:
>> 	- no change
>>
>>  arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts |   16 +++++++
>>  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |   16 +++++++
>>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi    |   44
>+++++++++++++++++++++
>>  3 files changed, 76 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> index 99a22ab..1a5acf6 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> @@ -95,6 +95,22 @@
>>  	};
>>  };
>>
>> +&sata0 {
>> +	status = "okay";
>> +};
>> +
>> +&sata1 {
>> +	status = "okay";
>> +};
>> +
>> +&sata2 {
>> +	status = "okay";
>> +};
>> +
>> +&sata3 {
>> +	status = "okay";
>> +};
>> +
>>  &uart0 {
>>  	status = "okay";
>>  };
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> index 6481e5f..5b6799e 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> @@ -102,6 +102,22 @@
>>  	};
>>  };
>>
>> +&sata0 {
>> +	status = "okay";
>> +};
>> +
>> +&sata1 {
>> +	status = "okay";
>> +};
>> +
>> +&sata2 {
>> +	status = "okay";
>> +};
>> +
>> +&sata3 {
>> +	status = "okay";
>> +};
>> +
>>  &uart0 {
>>  	status = "okay";
>>  };
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> index a79f5c1..592034b 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> @@ -671,6 +671,50 @@
>>  			status = "disabled";
>>  		};
>>
>> +		sata0: sata@3200000 {
>> +			compatible = "fsl,lx2160a-ahci";
>
>Has the kernel driver been patched to probe the compatible?
>
>Shawn
Yes, the driver patch is http://patchwork.ozlabs.org/patch/1034083/
BR
Peng
>
>> +			reg = <0x0 0x3200000 0x0 0x10000>,
>> +			      <0x7 0x100520 0x0 0x4>;
>> +			reg-names = "ahci", "sata-ecc";
>> +			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&clockgen 4 3>;
>> +			dma-coherent;
>> +			status = "disabled";
>> +		};
>> +
>> +		sata1: sata@3210000 {
>> +			compatible = "fsl,lx2160a-ahci";
>> +			reg = <0x0 0x3210000 0x0 0x10000>,
>> +			      <0x7 0x100520 0x0 0x4>;
>> +			reg-names = "ahci", "sata-ecc";
>> +			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&clockgen 4 3>;
>> +			dma-coherent;
>> +			status = "disabled";
>> +		};
>> +
>> +		sata2: sata@3220000 {
>> +			compatible = "fsl,lx2160a-ahci";
>> +			reg = <0x0 0x3220000 0x0 0x10000>,
>> +			      <0x7 0x100520 0x0 0x4>;
>> +			reg-names = "ahci", "sata-ecc";
>> +			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&clockgen 4 3>;
>> +			dma-coherent;
>> +			status = "disabled";
>> +		};
>> +
>> +		sata3: sata@3230000 {
>> +			compatible = "fsl,lx2160a-ahci";
>> +			reg = <0x0 0x3230000 0x0 0x10000>,
>> +			      <0x7 0x100520 0x0 0x4>;
>> +			reg-names = "ahci", "sata-ecc";
>> +			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&clockgen 4 3>;
>> +			dma-coherent;
>> +			status = "disabled";
>> +		};
>> +
>>  		smmu: iommu@5000000 {
>>  			compatible = "arm,mmu-500";
>>  			reg = <0 0x5000000 0 0x800000>;
>> --
>> 1.7.1
>>

Re: [v5 2/2] arm64: dts: lx2160a: add sata node support

[Shawn Guo]

On Mon, Feb 11, 2019 at 02:53:18AM +0000, Peng Ma wrote:
> 
> 
> >-----Original Message-----
> >From: Shawn Guo <shawnguo@kernel.org>
> >Sent: 2019年2月1日 14:30
> >To: Peng Ma <peng.ma@nxp.com>
> >Cc: axboe@kernel.dk; robh+dt@kernel.org; mark.rutland@arm.com; Leo Li
> ><leoyang.li@nxp.com>; linux-ide@vger.kernel.org; devicetree@vger.kernel.org;
> >linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Andy Tang
> ><andy.tang@nxp.com>
> >Subject: Re: [v5 2/2] arm64: dts: lx2160a: add sata node support
> >
> >On Fri, Jan 25, 2019 at 08:10:13AM +0000, Peng Ma wrote:
> >> Add SATA device nodes for fsl-lx2160a and enable support for QDS and
> >> RDB boards.
> >>
> >> Signed-off-by: Peng Ma <peng.ma@nxp.com>
> >> ---
> >> changed for V5:
> >> 	- no change
> >>
> >>  arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts |   16 +++++++
> >>  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |   16 +++++++
> >>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi    |   44
> >+++++++++++++++++++++
> >>  3 files changed, 76 insertions(+), 0 deletions(-)
> >>
> >> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> >> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> >> index 99a22ab..1a5acf6 100644
> >> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> >> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> >> @@ -95,6 +95,22 @@
> >>  	};
> >>  };
> >>
> >> +&sata0 {
> >> +	status = "okay";
> >> +};
> >> +
> >> +&sata1 {
> >> +	status = "okay";
> >> +};
> >> +
> >> +&sata2 {
> >> +	status = "okay";
> >> +};
> >> +
> >> +&sata3 {
> >> +	status = "okay";
> >> +};
> >> +
> >>  &uart0 {
> >>  	status = "okay";
> >>  };
> >> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> >> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> >> index 6481e5f..5b6799e 100644
> >> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> >> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> >> @@ -102,6 +102,22 @@
> >>  	};
> >>  };
> >>
> >> +&sata0 {
> >> +	status = "okay";
> >> +};
> >> +
> >> +&sata1 {
> >> +	status = "okay";
> >> +};
> >> +
> >> +&sata2 {
> >> +	status = "okay";
> >> +};
> >> +
> >> +&sata3 {
> >> +	status = "okay";
> >> +};
> >> +
> >>  &uart0 {
> >>  	status = "okay";
> >>  };
> >> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> >> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> >> index a79f5c1..592034b 100644
> >> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> >> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> >> @@ -671,6 +671,50 @@
> >>  			status = "disabled";
> >>  		};
> >>
> >> +		sata0: sata@3200000 {
> >> +			compatible = "fsl,lx2160a-ahci";
> >
> >Has the kernel driver been patched to probe the compatible?
> >
> >Shawn
> Yes, the driver patch is http://patchwork.ozlabs.org/patch/1034083/

Ping me when the driver patch is accepted.  Ideally, we only accept dts
changes after the driver counterpart lands on mainline.

Shawn

RE: [v5 2/2] arm64: dts: lx2160a: add sata node support

[Peng Ma]

>-----Original Message-----
>From: Shawn Guo <shawnguo@kernel.org>
>Sent: 2019年2月11日 13:39
>To: Peng Ma <peng.ma@nxp.com>
>Cc: axboe@kernel.dk; mark.rutland@arm.com; Andy Tang
><andy.tang@nxp.com>; devicetree@vger.kernel.org;
>linux-kernel@vger.kernel.org; Leo Li <leoyang.li@nxp.com>;
>linux-ide@vger.kernel.org; robh+dt@kernel.org;
>linux-arm-kernel@lists.infradead.org
>Subject: Re: [v5 2/2] arm64: dts: lx2160a: add sata node support
>
>On Mon, Feb 11, 2019 at 02:53:18AM +0000, Peng Ma wrote:
>>
>>
>> >-----Original Message-----
>> >From: Shawn Guo <shawnguo@kernel.org>
>> >Sent: 2019年2月1日 14:30
>> >To: Peng Ma <peng.ma@nxp.com>
>> >Cc: axboe@kernel.dk; robh+dt@kernel.org; mark.rutland@arm.com; Leo Li
>> ><leoyang.li@nxp.com>; linux-ide@vger.kernel.org;
>> >devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
>> >linux-arm-kernel@lists.infradead.org; Andy Tang <andy.tang@nxp.com>
>> >Subject: Re: [v5 2/2] arm64: dts: lx2160a: add sata node support
>> >
>> >On Fri, Jan 25, 2019 at 08:10:13AM +0000, Peng Ma wrote:
>> >> Add SATA device nodes for fsl-lx2160a and enable support for QDS
>> >> and RDB boards.
>> >>
>> >> Signed-off-by: Peng Ma <peng.ma@nxp.com>
>> >> ---
>> >> changed for V5:
>> >> 	- no change
>> >>
>> >>  arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts |   16 +++++++
>> >>  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |   16 +++++++
>> >>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi    |   44
>> >+++++++++++++++++++++
>> >>  3 files changed, 76 insertions(+), 0 deletions(-)
>> >>
>> >> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> >> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> >> index 99a22ab..1a5acf6 100644
>> >> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> >> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> >> @@ -95,6 +95,22 @@
>> >>  	};
>> >>  };
>> >>
>> >> +&sata0 {
>> >> +	status = "okay";
>> >> +};
>> >> +
>> >> +&sata1 {
>> >> +	status = "okay";
>> >> +};
>> >> +
>> >> +&sata2 {
>> >> +	status = "okay";
>> >> +};
>> >> +
>> >> +&sata3 {
>> >> +	status = "okay";
>> >> +};
>> >> +
>> >>  &uart0 {
>> >>  	status = "okay";
>> >>  };
>> >> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> >> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> >> index 6481e5f..5b6799e 100644
>> >> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> >> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> >> @@ -102,6 +102,22 @@
>> >>  	};
>> >>  };
>> >>
>> >> +&sata0 {
>> >> +	status = "okay";
>> >> +};
>> >> +
>> >> +&sata1 {
>> >> +	status = "okay";
>> >> +};
>> >> +
>> >> +&sata2 {
>> >> +	status = "okay";
>> >> +};
>> >> +
>> >> +&sata3 {
>> >> +	status = "okay";
>> >> +};
>> >> +
>> >>  &uart0 {
>> >>  	status = "okay";
>> >>  };
>> >> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> >> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> >> index a79f5c1..592034b 100644
>> >> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> >> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> >> @@ -671,6 +671,50 @@
>> >>  			status = "disabled";
>> >>  		};
>> >>
>> >> +		sata0: sata@3200000 {
>> >> +			compatible = "fsl,lx2160a-ahci";
>> >
>> >Has the kernel driver been patched to probe the compatible?
>> >
>> >Shawn
>> Yes, the driver patch is
>> https://emea01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fpatc
>>
>hwork.ozlabs.org%2Fpatch%2F1034083%2F&amp;data=02%7C01%7Cpeng.ma
>%40nxp
>> .com%7C8daea4e4b2ea419cb2a008d68fe34f51%7C686ea1d3bc2b4c6fa92c
>d99c5c30
>>
>1635%7C0%7C0%7C636854603794170576&amp;sdata=z3ic8%2FAS10NcFjdP
>eJFpnFoo
>> R2Yo4oYO%2FAASr7r2Lhg%3D&amp;reserved=0
>
>Ping me when the driver patch is accepted.  Ideally, we only accept dts
>changes after the driver counterpart lands on mainline.
>
>Shawn
[Peng Ma] got it, thanks.
BR
Peng

Re: [v5 2/2] arm64: dts: lx2160a: add sata node support

[Mian Yousaf Kaukab]

On Fri, Jan 25, 2019 at 08:10:13AM +0000, Peng Ma wrote:
> Add SATA device nodes for fsl-lx2160a and enable support
> for QDS and RDB boards.
> 
> Signed-off-by: Peng Ma <peng.ma@nxp.com>
> ---
> changed for V5:
> 	- no change
> 
>  arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts |   16 +++++++
>  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |   16 +++++++
>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi    |   44 +++++++++++++++++++++
>  3 files changed, 76 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> index 99a22ab..1a5acf6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> @@ -95,6 +95,22 @@
>  	};
>  };
>  
> +&sata0 {
> +	status = "okay";
> +};
> +
> +&sata1 {
> +	status = "okay";
> +};
> +
> +&sata2 {
> +	status = "okay";
> +};
> +
> +&sata3 {
> +	status = "okay";
> +};
> +
>  &uart0 {
>  	status = "okay";
>  };
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> index 6481e5f..5b6799e 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> @@ -102,6 +102,22 @@
>  	};
>  };
>  
> +&sata0 {
> +	status = "okay";
> +};
> +
> +&sata1 {
> +	status = "okay";
> +};
> +
> +&sata2 {
> +	status = "okay";
> +};
> +
> +&sata3 {
> +	status = "okay";
> +};
> +
>  &uart0 {
>  	status = "okay";
>  };
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index a79f5c1..592034b 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -671,6 +671,50 @@
>  			status = "disabled";
>  		};
>  
> +		sata0: sata@3200000 {
> +			compatible = "fsl,lx2160a-ahci";
> +			reg = <0x0 0x3200000 0x0 0x10000>,
> +			      <0x7 0x100520 0x0 0x4>;
> +			reg-names = "ahci", "sata-ecc";
> +			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clockgen 4 3>;
> +			dma-coherent;
> +			status = "disabled";
> +		};
> +
> +		sata1: sata@3210000 {
> +			compatible = "fsl,lx2160a-ahci";
> +			reg = <0x0 0x3210000 0x0 0x10000>,
> +			      <0x7 0x100520 0x0 0x4>;
> +			reg-names = "ahci", "sata-ecc";
> +			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clockgen 4 3>;
> +			dma-coherent;
> +			status = "disabled";
> +		};
> +
> +		sata2: sata@3220000 {
> +			compatible = "fsl,lx2160a-ahci";
> +			reg = <0x0 0x3220000 0x0 0x10000>,
> +			      <0x7 0x100520 0x0 0x4>;
> +			reg-names = "ahci", "sata-ecc";
> +			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clockgen 4 3>;
> +			dma-coherent;
> +			status = "disabled";
> +		};
> +
> +		sata3: sata@3230000 {
> +			compatible = "fsl,lx2160a-ahci";
> +			reg = <0x0 0x3230000 0x0 0x10000>,
> +			      <0x7 0x100520 0x0 0x4>;
You are using same reg values for sata-ecc in all sata instances. Does this
actually work? No errors when the ahci_qoriq driver do ioremap on it while
probing second instance and onward?

fsl-ls208xa.dtsi is the only other file here with multiple sata instances and
it doesn’t care about sata-ecc.

> +			reg-names = "ahci", "sata-ecc";
> +			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clockgen 4 3>;
> +			dma-coherent;
> +			status = "disabled";
> +		};
> +
>  		smmu: iommu@5000000 {
>  			compatible = "arm,mmu-500";
>  			reg = <0 0x5000000 0 0x800000>;

BR,
Yousaf

RE: [v5 2/2] arm64: dts: lx2160a: add sata node support

[Peng Ma]

>-----Original Message-----
>From: Mian Yousaf Kaukab <ykaukab@suse.de>
>Sent: 2019年2月13日 3:01
>To: Peng Ma <peng.ma@nxp.com>
>Cc: axboe@kernel.dk; shawnguo@kernel.org; robh+dt@kernel.org;
>mark.rutland@arm.com; Leo Li <leoyang.li@nxp.com>;
>linux-ide@vger.kernel.org; devicetree@vger.kernel.org;
>linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Andy Tang
><andy.tang@nxp.com>
>Subject: Re: [v5 2/2] arm64: dts: lx2160a: add sata node support
>
>On Fri, Jan 25, 2019 at 08:10:13AM +0000, Peng Ma wrote:
>> Add SATA device nodes for fsl-lx2160a and enable support for QDS and
>> RDB boards.
>>
>> Signed-off-by: Peng Ma <peng.ma@nxp.com>
>> ---
>> changed for V5:
>> 	- no change
>>
>>  arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts |   16 +++++++
>>  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |   16 +++++++
>>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi    |   44
>+++++++++++++++++++++
>>  3 files changed, 76 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> index 99a22ab..1a5acf6 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>> @@ -95,6 +95,22 @@
>>  	};
>>  };
>>
>> +&sata0 {
>> +	status = "okay";
>> +};
>> +
>> +&sata1 {
>> +	status = "okay";
>> +};
>> +
>> +&sata2 {
>> +	status = "okay";
>> +};
>> +
>> +&sata3 {
>> +	status = "okay";
>> +};
>> +
>>  &uart0 {
>>  	status = "okay";
>>  };
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> index 6481e5f..5b6799e 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>> @@ -102,6 +102,22 @@
>>  	};
>>  };
>>
>> +&sata0 {
>> +	status = "okay";
>> +};
>> +
>> +&sata1 {
>> +	status = "okay";
>> +};
>> +
>> +&sata2 {
>> +	status = "okay";
>> +};
>> +
>> +&sata3 {
>> +	status = "okay";
>> +};
>> +
>>  &uart0 {
>>  	status = "okay";
>>  };
>> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> index a79f5c1..592034b 100644
>> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>> @@ -671,6 +671,50 @@
>>  			status = "disabled";
>>  		};
>>
>> +		sata0: sata@3200000 {
>> +			compatible = "fsl,lx2160a-ahci";
>> +			reg = <0x0 0x3200000 0x0 0x10000>,
>> +			      <0x7 0x100520 0x0 0x4>;
>> +			reg-names = "ahci", "sata-ecc";
>> +			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&clockgen 4 3>;
>> +			dma-coherent;
>> +			status = "disabled";
>> +		};
>> +
>> +		sata1: sata@3210000 {
>> +			compatible = "fsl,lx2160a-ahci";
>> +			reg = <0x0 0x3210000 0x0 0x10000>,
>> +			      <0x7 0x100520 0x0 0x4>;
>> +			reg-names = "ahci", "sata-ecc";
>> +			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&clockgen 4 3>;
>> +			dma-coherent;
>> +			status = "disabled";
>> +		};
>> +
>> +		sata2: sata@3220000 {
>> +			compatible = "fsl,lx2160a-ahci";
>> +			reg = <0x0 0x3220000 0x0 0x10000>,
>> +			      <0x7 0x100520 0x0 0x4>;
>> +			reg-names = "ahci", "sata-ecc";
>> +			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&clockgen 4 3>;
>> +			dma-coherent;
>> +			status = "disabled";
>> +		};
>> +
>> +		sata3: sata@3230000 {
>> +			compatible = "fsl,lx2160a-ahci";
>> +			reg = <0x0 0x3230000 0x0 0x10000>,
>> +			      <0x7 0x100520 0x0 0x4>;
>You are using same reg values for sata-ecc in all sata instances. Does this
>actually work? No errors when the ahci_qoriq driver do ioremap on it while
>probing second instance and onward?
>
 Thanks for you point out the problem. I will fixed it with two or more sata enable.
>fsl-ls208xa.dtsi is the only other file here with multiple sata instances and it
>doesn’t care about sata-ecc.
>
The ls208xa platforms is not necessary to set sata-ecc addr.
BR,
Peng
>> +			reg-names = "ahci", "sata-ecc";
>> +			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
>> +			clocks = <&clockgen 4 3>;
>> +			dma-coherent;
>> +			status = "disabled";
>> +		};
>> +
>>  		smmu: iommu@5000000 {
>>  			compatible = "arm,mmu-500";
>>  			reg = <0 0x5000000 0 0x800000>;
>
>BR,
>Yousaf

RE: [v5 2/2] arm64: dts: lx2160a: add sata node support

[Peng Ma]

Hi Yousaf,

To set sata bit of ecc-addr will affect all sata controllers, The v6 patch has been sent will fixed the remap error when two or more sata controllers be probed, please review.
Thanks.

Best Regards,
Peng
>-----Original Message-----
>From: Peng Ma
>Sent: 2019年2月14日 17:19
>To: 'Mian Yousaf Kaukab' <ykaukab@suse.de>
>Cc: axboe@kernel.dk; shawnguo@kernel.org; robh+dt@kernel.org;
>mark.rutland@arm.com; Leo Li <leoyang.li@nxp.com>;
>linux-ide@vger.kernel.org; devicetree@vger.kernel.org;
>linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Andy Tang
><andy.tang@nxp.com>
>Subject: RE: [v5 2/2] arm64: dts: lx2160a: add sata node support
>
>
>
>>-----Original Message-----
>>From: Mian Yousaf Kaukab <ykaukab@suse.de>
>>Sent: 2019年2月13日 3:01
>>To: Peng Ma <peng.ma@nxp.com>
>>Cc: axboe@kernel.dk; shawnguo@kernel.org; robh+dt@kernel.org;
>>mark.rutland@arm.com; Leo Li <leoyang.li@nxp.com>;
>>linux-ide@vger.kernel.org; devicetree@vger.kernel.org;
>>linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
>>Andy Tang <andy.tang@nxp.com>
>>Subject: Re: [v5 2/2] arm64: dts: lx2160a: add sata node support
>>
>>On Fri, Jan 25, 2019 at 08:10:13AM +0000, Peng Ma wrote:
>>> Add SATA device nodes for fsl-lx2160a and enable support for QDS and
>>> RDB boards.
>>>
>>> Signed-off-by: Peng Ma <peng.ma@nxp.com>
>>> ---
>>> changed for V5:
>>> 	- no change
>>>
>>>  arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts |   16 +++++++
>>>  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts |   16 +++++++
>>>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi    |   44
>>+++++++++++++++++++++
>>>  3 files changed, 76 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>>> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>>> index 99a22ab..1a5acf6 100644
>>> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>>> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
>>> @@ -95,6 +95,22 @@
>>>  	};
>>>  };
>>>
>>> +&sata0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&sata1 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&sata2 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&sata3 {
>>> +	status = "okay";
>>> +};
>>> +
>>>  &uart0 {
>>>  	status = "okay";
>>>  };
>>> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>>> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>>> index 6481e5f..5b6799e 100644
>>> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>>> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
>>> @@ -102,6 +102,22 @@
>>>  	};
>>>  };
>>>
>>> +&sata0 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&sata1 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&sata2 {
>>> +	status = "okay";
>>> +};
>>> +
>>> +&sata3 {
>>> +	status = "okay";
>>> +};
>>> +
>>>  &uart0 {
>>>  	status = "okay";
>>>  };
>>> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>>> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>>> index a79f5c1..592034b 100644
>>> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>>> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
>>> @@ -671,6 +671,50 @@
>>>  			status = "disabled";
>>>  		};
>>>
>>> +		sata0: sata@3200000 {
>>> +			compatible = "fsl,lx2160a-ahci";
>>> +			reg = <0x0 0x3200000 0x0 0x10000>,
>>> +			      <0x7 0x100520 0x0 0x4>;
>>> +			reg-names = "ahci", "sata-ecc";
>>> +			interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
>>> +			clocks = <&clockgen 4 3>;
>>> +			dma-coherent;
>>> +			status = "disabled";
>>> +		};
>>> +
>>> +		sata1: sata@3210000 {
>>> +			compatible = "fsl,lx2160a-ahci";
>>> +			reg = <0x0 0x3210000 0x0 0x10000>,
>>> +			      <0x7 0x100520 0x0 0x4>;
>>> +			reg-names = "ahci", "sata-ecc";
>>> +			interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
>>> +			clocks = <&clockgen 4 3>;
>>> +			dma-coherent;
>>> +			status = "disabled";
>>> +		};
>>> +
>>> +		sata2: sata@3220000 {
>>> +			compatible = "fsl,lx2160a-ahci";
>>> +			reg = <0x0 0x3220000 0x0 0x10000>,
>>> +			      <0x7 0x100520 0x0 0x4>;
>>> +			reg-names = "ahci", "sata-ecc";
>>> +			interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
>>> +			clocks = <&clockgen 4 3>;
>>> +			dma-coherent;
>>> +			status = "disabled";
>>> +		};
>>> +
>>> +		sata3: sata@3230000 {
>>> +			compatible = "fsl,lx2160a-ahci";
>>> +			reg = <0x0 0x3230000 0x0 0x10000>,
>>> +			      <0x7 0x100520 0x0 0x4>;
>>You are using same reg values for sata-ecc in all sata instances. Does
>>this actually work? No errors when the ahci_qoriq driver do ioremap on
>>it while probing second instance and onward?
>>
> Thanks for you point out the problem. I will fixed it with two or more sata
>enable.
>>fsl-ls208xa.dtsi is the only other file here with multiple sata
>>instances and it doesn’t care about sata-ecc.
>>
>The ls208xa platforms is not necessary to set sata-ecc addr.
>BR,
>Peng
>>> +			reg-names = "ahci", "sata-ecc";
>>> +			interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
>>> +			clocks = <&clockgen 4 3>;
>>> +			dma-coherent;
>>> +			status = "disabled";
>>> +		};
>>> +
>>>  		smmu: iommu@5000000 {
>>>  			compatible = "arm,mmu-500";
>>>  			reg = <0 0x5000000 0 0x800000>;
>>
>>BR,
>>Yousaf