From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 367DAC282DB for ; Sat, 2 Feb 2019 23:20:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 045F620856 for ; Sat, 2 Feb 2019 23:20:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=crapouillou.net header.i=@crapouillou.net header.b="DJtq5NIj" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727213AbfBBXUA (ORCPT ); Sat, 2 Feb 2019 18:20:00 -0500 Received: from outils.crapouillou.net ([89.234.176.41]:52956 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727169AbfBBXT4 (ORCPT ); Sat, 2 Feb 2019 18:19:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1549149594; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:in-reply-to: references:references; bh=2DVrF9XfoCPEIcaQJb41Hi/FfGsoayBTTGKWogn+zsI=; b=DJtq5NIjQd0RjirweR7i/8cGmKsVihPu0v15JYFj+Id+9Rjh382R+71E4ET5H6oWVVfkq4 sfSF/VV/NwIv3jTWHQ0RvNRX6MpE+AOtihQxvb4V/Cc7DuMkcumfJ8HzD+dHlknbV0J8mF +P431Co2a2b9x+9X/HS1hfWjMY45280= From: Paul Cercueil To: David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Rob Herring , Mark Rutland , Miquel Raynal , Harvey Hunt Cc: Mathieu Malaterre , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Paul Cercueil Subject: [PATCH v2 2/9] dt-bindings: mtd: ingenic: Add compatible strings for the JZ4740 Date: Sat, 2 Feb 2019 20:19:19 -0300 Message-Id: <20190202231926.2444-3-paul@crapouillou.net> In-Reply-To: <20190202231926.2444-1-paul@crapouillou.net> References: <20190202231926.2444-1-paul@crapouillou.net> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add compatible strings to probe the jz4780-nand and jz4780-bch drivers from devicetree on the JZ4725B and JZ4740 SoCs from Ingenic. Signed-off-by: Paul Cercueil --- Changes: v2: - Change 'ingenic,jz4725b-nand' compatible string to 'ingenic,jz4740-nand' to reflect driver change - Add 'ingenic,jz4740-bch' compatible string - Document 'ingenic,oob-layout' property .../devicetree/bindings/mtd/ingenic,jz4780-nand.txt | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt index 29ea5853ca91..294b56a2098a 100644 --- a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt +++ b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt @@ -6,7 +6,9 @@ memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must be children of the NEMC node. Required NAND controller device properties: -- compatible: Should be set to "ingenic,jz4780-nand". +- compatible: Should be one of: + * ingenic,jz4740-nand + * ingenic,jz4780-nand - reg: For each bank with a NAND chip attached, should specify a bank number, an offset of 0 and a size of 0x1000000 (i.e. the whole NEMC bank). @@ -15,6 +17,10 @@ Optional NAND controller device properties: property must contain a phandle for the BCH controller node. The required properties for this node are described below. If this is not specified, software BCH will be used instead. +- ingenic,oob-layout: Specify the OOB layout to replace the default one. + Valid values are: + * ingenic,jz4725b + * qi,lb60 Optional children nodes: - Individual NAND chips are children of the NAND controller node. @@ -72,7 +78,10 @@ NAND devices. The following is a description of the device properties for a BCH controller. Required BCH properties: -- compatible: Should be set to "ingenic,jz4780-bch". +- compatible: Should be one of: + * ingenic,jz4740-bch + * ingenic,jz4725b-bch + * ingenic,jz4780-bch - reg: Should specify the BCH controller registers location and length. - clocks: Clock for the BCH controller. -- 2.20.1