From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Yauhen Kharuzhy <jekhor@gmail.com>
Cc: linux-kernel@vger.kernel.org,
MyungJoo Ham <myungjoo.ham@samsung.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Hans de Goede <hdegoede@redhat.com>
Subject: Re: [PATCH v2 1/2] extcon-intel-cht-wc: Make charger detection co-existed with OTG host mode
Date: Wed, 20 Feb 2019 14:42:06 +0200 [thread overview]
Message-ID: <20190220124206.GP9224@smile.fi.intel.com> (raw)
In-Reply-To: <20190219212441.19391-2-jekhor@gmail.com>
On Wed, Feb 20, 2019 at 12:24:40AM +0300, Yauhen Kharuzhy wrote:
> Whiskey Cove Cherry Trail PMIC requires disabling OTG host mode before
> of charger detection procedure. Do this by manipulationg of CHGRCTRL1
> register.
>
> Source: APCI DSDT code of Lenovo Yoga Book YB1-X91L and open-sourced
> Intel's drivers.
Some minor comments below.
Otherwise,
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> -#define CHT_WC_CHGRCTRL1 0x5e17
> +#define CHT_WC_CHGRCTRL1 0x5e17
Not related change?
> +#define CHT_WC_CHGRCTRL1_DBPEN_MASK BIT(7)
Drop the _MASK, it's one bit anyway.
> +#define CHT_WC_CHGRCTRL1_OTGMODE BIT(6)
> +#define CHT_WC_CHGRCTRL1_FTEMP_EVENT BIT(5)
> +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_1500 BIT(4)
> +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_900 BIT(3)
> +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_500 BIT(2)
> +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_150 BIT(1)
> +#define CHT_WC_CHGRCTRL1_FUSB_INLMT_100 BIT(0)
I think better to keep ascending order.
> +static void cht_wc_extcon_set_otgmode(struct cht_wc_extcon_data *ext,
> + bool enable)
> +{
> + unsigned int chgrctrl1;
> + int ret;
> +
> + ret = regmap_read(ext->regmap, CHT_WC_CHGRCTRL1, &chgrctrl1);
> + if (ret) {
> + dev_err(ext->dev, "Error reading CHGRCTRL1 reg: %d\n", ret);
> + return;
> + }
> +
> + if (enable)
> + chgrctrl1 |= CHT_WC_CHGRCTRL1_OTGMODE;
> + else
> + chgrctrl1 &= ~(CHT_WC_CHGRCTRL1_OTGMODE);
Redundant parens.
> +
> + ret = regmap_write(ext->regmap, CHT_WC_CHGRCTRL1, chgrctrl1);
> + if (ret)
> + dev_err(ext->dev,
> + "Error writing CHGRCTRL1 OTG mode bit: %d\n", ret);
> +}
--
With Best Regards,
Andy Shevchenko
next prev parent reply other threads:[~2019-02-20 12:42 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-19 21:24 [PATCH v2 0/2] extcon: Intel Cherry Trail Whiskey Cove PMIC and external charger tweaks Yauhen Kharuzhy
2019-02-19 21:24 ` [PATCH v2 1/2] extcon-intel-cht-wc: Make charger detection co-existed with OTG host mode Yauhen Kharuzhy
2019-02-20 12:42 ` Andy Shevchenko [this message]
2019-02-20 20:46 ` Yauhen Kharuzhy
2019-02-19 21:24 ` [PATCH v2 2/2] extcon intel-cht-wc: Enable external charger Yauhen Kharuzhy
2019-02-20 13:08 ` Andy Shevchenko
2019-02-20 15:53 ` Hans de Goede
2019-02-20 21:24 ` Yauhen Kharuzhy
2019-02-22 9:18 ` Hans de Goede
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190220124206.GP9224@smile.fi.intel.com \
--to=andriy.shevchenko@linux.intel.com \
--cc=cw00.choi@samsung.com \
--cc=hdegoede@redhat.com \
--cc=jekhor@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=myungjoo.ham@samsung.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).