From: Borislav Petkov <bp@alien8.de>
To: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/5] EDAC/amd64: Add Fam17hMod30h PCI IDs
Date: Tue, 26 Feb 2019 11:41:29 +0100 [thread overview]
Message-ID: <20190226104129.GA14836@zn.tnic> (raw)
In-Reply-To: <20190219202536.15462-1-Yazen.Ghannam@amd.com>
Just nitpicks:
On Tue, Feb 19, 2019 at 08:25:51PM +0000, Ghannam, Yazen wrote:
> Subject: Re: [PATCH 1/5] EDAC/amd64: Add Fam17hMod30h PCI IDs
Write that "Fam17hMod30h" in a human readable form pls. Especially in
the subject: "family 0x17, models 0x30..."
> From: Yazen Ghannam <yazen.ghannam@amd.com>
>
> Add the new Family 17h Model 30h PCI IDs to the AMD64 EDAC module.
>
> This also fixes a probe failure that appeared when some other PCI IDs
> for Fam17hMod30h were added to the AMD NB code.
>
> Fixes: be3518a16ef2 (x86/amd_nb: Add PCI device IDs for family 17h, model 30h)
> Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
> ---
> drivers/edac/amd64_edac.c | 15 ++++++++++++++-
> drivers/edac/amd64_edac.h | 3 +++
> 2 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
> index 6ea98575a402..9947437d9574 100644
> --- a/drivers/edac/amd64_edac.c
> +++ b/drivers/edac/amd64_edac.c
> @@ -2211,6 +2211,15 @@ static struct amd64_family_type family_types[] = {
> .dbam_to_cs = f17_base_addr_to_cs_size,
> }
> },
> + [F17_M30H_CPUS] = {
> + .ctl_name = "F17h_M30h",
> + .f0_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F0,
> + .f6_id = PCI_DEVICE_ID_AMD_17H_M30H_DF_F6,
> + .ops = {
> + .early_channel_count = f17_early_channel_count,
> + .dbam_to_cs = f17_base_addr_to_cs_size,
> + }
> + },
> };
>
> /*
> @@ -3199,7 +3208,11 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
> break;
>
> case 0x17:
> - if (pvt->model >= 0x10 && pvt->model <= 0x2f) {
> + if (pvt->model >= 0x30 && pvt->model <= 0x3f) {
> + fam_type = &family_types[F17_M30H_CPUS];
> + pvt->ops = &family_types[F17_M30H_CPUS].ops;
> + break;
> + } else if (pvt->model >= 0x10 && pvt->model <= 0x2f) {
Sort the checks in increasing models so that it is easier to follow.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
next prev parent reply other threads:[~2019-02-26 10:41 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-19 20:25 [PATCH 1/5] EDAC/amd64: Add Fam17hMod30h PCI IDs Ghannam, Yazen
2019-02-19 20:25 ` [PATCH 2/5] EDAC/amd64: Support more than two UMCs Ghannam, Yazen
2019-02-26 11:07 ` Borislav Petkov
2019-02-26 15:12 ` Ghannam, Yazen
2019-02-19 20:25 ` [PATCH 3/5] EDAC/amd64: Recognize x16 Symbol Size Ghannam, Yazen
2019-02-26 13:17 ` Borislav Petkov
2019-02-19 20:26 ` [PATCH 4/5] EDAC/amd64: Support more than two Controllers for Chip Select handling Ghannam, Yazen
2019-02-26 13:24 ` Borislav Petkov
2019-02-19 20:26 ` [PATCH 5/5] EDAC/amd64: Adjust printed Chip Select sizes when interleaved Ghannam, Yazen
2019-02-26 10:41 ` Borislav Petkov [this message]
2019-02-26 15:07 ` [PATCH 1/5] EDAC/amd64: Add Fam17hMod30h PCI IDs Ghannam, Yazen
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