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received-spf: None (protection.outlook.com: amd.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 47b+8nbD6Hn9zCiBi+gRvU0v7hNfuvQnCPaFNOsQqLBxhkdenJEl2lhz1xj+Mov4iOWC+KfODRjTZqNNVcXx2P5c/RfplNFvE/AW2z4Rj7csXXwl+rVS7IZzedXC7mL8Lld2eimpWbg5/05cmqsiJhXIPadxcwJor19E951FeXuqg5zEYdypf4vdd2dhTxsf6MlJvtpH5cBsZ5kzF5xgB7PZz/LlaGXjcGxRwcrdOw40/qCRJXAmZW+Qj5EibB6rhGLSSdt2S4DnsrSeCaydO+OQcH0sh2NyqCZArKjs6gxNe/0WqzFWGmPezMZ1NBZlmBecy+cwv+/K+FTINNGbolEqAO567yERR/GG8dHnMfvpvCS2IfpnAxXfgUkptQESq8xlgDFdylRidqmOp/551WgA5OhIArrhkWVZZQ+sSI4= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 79743eb3-b024-4a4a-b975-08d69c0f718d X-MS-Exchange-CrossTenant-originalarrivaltime: 26 Feb 2019 17:25:45.8346 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR12MB2800 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yazen Ghannam Define and use a macro for looping over the number of Unified Memory Controllers. No functional change. Signed-off-by: Yazen Ghannam --- Link: https://lkml.kernel.org/r/20190219202536.15462-2-Yazen.Ghannam@amd.com v1->v2: * New in V2. Please see comment on Patch 2 V1 at link above. drivers/edac/amd64_edac.c | 17 ++++++++++------- 1 file changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 0038fcb0b010..c82aafb7246a 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -449,6 +449,9 @@ static void get_cs_base_and_mask(struct amd64_pvt *pvt,= int csrow, u8 dct, #define for_each_chip_select_mask(i, dct, pvt) \ for (i =3D 0; i < pvt->csels[dct].m_cnt; i++) =20 +#define for_each_umc(i) \ + for (i =3D 0; i < num_umcs; i++) + /* * @input_addr is an InputAddr associated with the node given by mci. Retu= rn the * csrow that input_addr maps to, or -1 on failure (no csrow claims input_= addr). @@ -722,7 +725,7 @@ static unsigned long determine_edac_cap(struct amd64_pv= t *pvt) if (pvt->umc) { u8 i, umc_en_mask =3D 0, dimm_ecc_en_mask =3D 0; =20 - for (i =3D 0; i < num_umcs; i++) { + for_each_umc(i) { if (!(pvt->umc[i].sdp_ctrl & UMC_SDP_INIT)) continue; =20 @@ -811,7 +814,7 @@ static void __dump_misc_regs_df(struct amd64_pvt *pvt) struct amd64_umc *umc; u32 i, tmp, umc_base; =20 - for (i =3D 0; i < num_umcs; i++) { + for_each_umc(i) { umc_base =3D get_umc_base(i); umc =3D &pvt->umc[i]; =20 @@ -1388,7 +1391,7 @@ static int f17_early_channel_count(struct amd64_pvt *= pvt) int i, channels =3D 0; =20 /* SDP Control bit 31 (SdpInit) is clear for unused UMC channels */ - for (i =3D 0; i < num_umcs; i++) + for_each_umc(i) channels +=3D !!(pvt->umc[i].sdp_ctrl & UMC_SDP_INIT); =20 amd64_info("MCT channel count: %d\n", channels); @@ -2604,7 +2607,7 @@ static void determine_ecc_sym_sz(struct amd64_pvt *pv= t) if (pvt->umc) { u8 i; =20 - for (i =3D 0; i < num_umcs; i++) { + for_each_umc(i) { /* Check enabled channels only: */ if ((pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) && (pvt->umc[i].ecc_ctrl & BIT(7))) { @@ -2640,7 +2643,7 @@ static void __read_mc_regs_df(struct amd64_pvt *pvt) u32 i, umc_base; =20 /* Read registers from each UMC */ - for (i =3D 0; i < num_umcs; i++) { + for_each_umc(i) { =20 umc_base =3D get_umc_base(i); umc =3D &pvt->umc[i]; @@ -3053,7 +3056,7 @@ static bool ecc_enabled(struct pci_dev *F3, u16 nid) if (boot_cpu_data.x86 >=3D 0x17) { u8 umc_en_mask =3D 0, ecc_en_mask =3D 0; =20 - for (i =3D 0; i < num_umcs; i++) { + for_each_umc(i) { u32 base =3D get_umc_base(i); =20 /* Only check enabled UMCs. */ @@ -3106,7 +3109,7 @@ f17h_determine_edac_ctl_cap(struct mem_ctl_info *mci,= struct amd64_pvt *pvt) { u8 i, ecc_en =3D 1, cpk_en =3D 1; =20 - for (i =3D 0; i < num_umcs; i++) { + for_each_umc(i) { if (pvt->umc[i].sdp_ctrl & UMC_SDP_INIT) { ecc_en &=3D !!(pvt->umc[i].umc_cap_hi & UMC_ECC_ENABLED); cpk_en &=3D !!(pvt->umc[i].umc_cap_hi & UMC_ECC_CHIPKILL_CAP); --=20 2.17.1