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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id f68sm14446626wmg.5.2019.03.01.02.21.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 01 Mar 2019 02:21:44 -0800 (PST) From: Neil Armstrong To: jbrunet@baylibre.com, devicetree@vger.kernel.org Cc: Neil Armstrong , linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] clk: meson-g12a: add cpu clock bindings Date: Fri, 1 Mar 2019 11:21:39 +0100 Message-Id: <20190301102140.7181-2-narmstrong@baylibre.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190301102140.7181-1-narmstrong@baylibre.com> References: <20190301102140.7181-1-narmstrong@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add Amlogic G12A Family CPU clocks bindings, only export CPU_CLK since it should be the only ID used. Signed-off-by: Neil Armstrong --- drivers/clk/meson/g12a.h | 24 +++++++++++++++++++++++- include/dt-bindings/clock/g12a-clkc.h | 1 + 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/drivers/clk/meson/g12a.h b/drivers/clk/meson/g12a.h index f399dfe1401c..4854750df902 100644 --- a/drivers/clk/meson/g12a.h +++ b/drivers/clk/meson/g12a.h @@ -166,8 +166,30 @@ #define CLKID_MALI_0_DIV 170 #define CLKID_MALI_1_DIV 173 #define CLKID_MPLL_5OM_DIV 176 +#define CLKID_PCIE_PLL_DCO 178 +#define CLKID_PCIE_PLL_DCO_DIV2 179 +#define CLKID_PCIE_PLL_OD 180 +#define CLKID_SYS_PLL_DIV16_EN 181 +#define CLKID_SYS_PLL_DIV16 182 +#define CLKID_CPU_CLK_DYN0_SEL 183 +#define CLKID_CPU_CLK_DYN0_DIV 184 +#define CLKID_CPU_CLK_DYN0 185 +#define CLKID_CPU_CLK_DYN1_SEL 186 +#define CLKID_CPU_CLK_DYN1_DIV 187 +#define CLKID_CPU_CLK_DYN1 188 +#define CLKID_CPU_CLK_DYN 189 +#define CLKID_CPU_CLK_DIV16_EN 191 +#define CLKID_CPU_CLK_DIV16 192 +#define CLKID_CPU_CLK_APB_DIV 193 +#define CLKID_CPU_CLK_APB 194 +#define CLKID_CPU_CLK_ATB_DIV 195 +#define CLKID_CPU_CLK_ATB 196 +#define CLKID_CPU_CLK_AXI_DIV 197 +#define CLKID_CPU_CLK_AXI 198 +#define CLKID_CPU_CLK_TRACE_DIV 299 +#define CLKID_CPU_CLK_TRACE 200 -#define NR_CLKS 178 +#define NR_CLKS 201 /* include the CLKIDs that have been made part of the DT binding */ #include diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h index 83b657038d1e..33aba232282c 100644 --- a/include/dt-bindings/clock/g12a-clkc.h +++ b/include/dt-bindings/clock/g12a-clkc.h @@ -131,5 +131,6 @@ #define CLKID_MALI_1 174 #define CLKID_MALI 175 #define CLKID_MPLL_5OM 177 +#define CLKID_CPU_CLK 190 #endif /* __G12A_CLKC_H */ -- 2.20.1