From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A49EC4360F for ; Sat, 2 Mar 2019 09:05:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E877720863 for ; Sat, 2 Mar 2019 09:05:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727420AbfCBJFe (ORCPT ); Sat, 2 Mar 2019 04:05:34 -0500 Received: from szxga07-in.huawei.com ([45.249.212.35]:58182 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1725986AbfCBJFd (ORCPT ); Sat, 2 Mar 2019 04:05:33 -0500 Received: from DGGEMS406-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id A8047D22D43E0FE2CAB2; Sat, 2 Mar 2019 17:05:30 +0800 (CST) Received: from vm100-107-113-134.huawei.com (100.107.113.134) by DGGEMS406-HUB.china.huawei.com (10.3.19.206) with Microsoft SMTP Server id 14.3.408.0; Sat, 2 Mar 2019 17:05:23 +0800 From: Yu Chen To: , , CC: , , , , , , , , , , , , , , Yu Chen Subject: [PATCH v3 03/12] usb: dwc3: dwc3-of-simple: Add support for dwc3 of Hisilicon Soc Platform Date: Sat, 2 Mar 2019 17:04:56 +0800 Message-ID: <20190302090505.65542-4-chenyu56@huawei.com> X-Mailer: git-send-email 2.15.0-rc2 In-Reply-To: <20190302090505.65542-1-chenyu56@huawei.com> References: <20190302090505.65542-1-chenyu56@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [100.107.113.134] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds support for the poweron and shutdown of dwc3 core on Hisilicon Soc Platform. --- drivers/usb/dwc3/dwc3-of-simple.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/dwc3-of-simple.c b/drivers/usb/dwc3/dwc3-of-simple.c index 4c2771c5e727..0ed09d876542 100644 --- a/drivers/usb/dwc3/dwc3-of-simple.c +++ b/drivers/usb/dwc3/dwc3-of-simple.c @@ -98,7 +98,8 @@ static int dwc3_of_simple_probe(struct platform_device *pdev) * Some controllers need to toggle the usb3-otg reset before trying to * initialize the PHY, otherwise the PHY times out. */ - if (of_device_is_compatible(np, "rockchip,rk3399-dwc3")) + if (of_device_is_compatible(np, "rockchip,rk3399-dwc3") || + of_device_is_compatible(np, "hisilicon,hi3660-dwc3")) simple->need_reset = true; if (of_device_is_compatible(np, "amlogic,meson-axg-dwc3") || @@ -243,6 +244,7 @@ static const struct of_device_id of_dwc3_simple_match[] = { { .compatible = "amlogic,meson-axg-dwc3" }, { .compatible = "amlogic,meson-gxl-dwc3" }, { .compatible = "allwinner,sun50i-h6-dwc3" }, + { .compatible = "hisilicon,hi3660-dwc3" }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, of_dwc3_simple_match); -- 2.15.0-rc2