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From: Maxime Ripard <maxime.ripard@bootlin.com>
To: Chen-Yu Tsai <wens@kernel.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>,
	linux-sunxi <linux-sunxi@googlegroups.com>,
	linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-kernel <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 4/6] nvmem: sunxi_sid: Read out data in native format
Date: Mon, 18 Mar 2019 10:25:19 +0100	[thread overview]
Message-ID: <20190318092519.g2rvdjiunti2ev7p@flea> (raw)
In-Reply-To: <CAGb2v64pq5V0_nZ7f0ZPwuNxNU8HbY0A6CqeC6TMd2z2xhJHwg@mail.gmail.com>

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On Mon, Mar 18, 2019 at 05:09:44PM +0800, Chen-Yu Tsai wrote:
> On Mon, Mar 18, 2019 at 4:57 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> >
> > On Mon, Mar 18, 2019 at 04:45:19PM +0800, Chen-Yu Tsai wrote:
> > > On Mon, Mar 18, 2019 at 4:42 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote:
> > > >
> > > > Hi,
> > > >
> > > > On Mon, Mar 18, 2019 at 03:33:52PM +0800, Chen-Yu Tsai wrote:
> > > > > From: Chen-Yu Tsai <wens@csie.org>
> > > > >
> > > > > Originally the SID e-fuses were thought to be in big-endian format.
> > > > > Later sources show that they are in fact native or little-endian.
> > > > > The most compelling evidence is the thermal sensor calibration data,
> > > > > which is a set of one to three 16-bit values. In native-endian they
> > > > > are in 16-bit cells with increasing offsets, whereas with big-endian
> > > > > they are in the wrong order, and a gap with no data will show if there
> > > > > are one or three cells.
> > > > >
> > > > > Switch to a native endian representation for the nvmem device. For the
> > > > > H3, the register read-out method was already returning data in native
> > > > > endian. This only affects the other SoCs.
> > > > >
> > > > > Signed-off-by: Chen-Yu Tsai <wens@csie.org>
> > > >
> > > > I thought only the newer SoCs were impacted by this issue?
> > >
> > > It is noticable on the newer SoCs. The old ones only have the 128-bit SID,
> > > which could be read either way, as AFAIK it's just a serial number.
> > >
> > > If you think we should leave the old ones alone I can factor that in.
> >
> > IIRC, there was also the SoC ID in the SID on those SoCs as well,
> > which we might have to use in the future so we'll want to make sure it
> > is correct.
>
> We'll need to ask Allwinner about this then.
>
> FWIW, the fel command in sunxi-tools reads them out in little endian. I
> believe this and the SID page on the linux-sunxi wiki predate the sunxi_sid
> driver.

Yeah, and the driver has a readl as well:
https://github.com/linux-sunxi/linux-sunxi/blob/sunxi-3.4/arch/arm/plat-sunxi/soc-detect.c#L92

For the whole series,
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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  reply	other threads:[~2019-03-18  9:25 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-18  7:33 [PATCH 0/6] nvmem: sunxi_sid: native format and A83T/H5 support Chen-Yu Tsai
2019-03-18  7:33 ` [PATCH 1/6] nvmem: sunxi_sid: Read out SID for randomness without looping Chen-Yu Tsai
2019-03-18  7:33 ` [PATCH 2/6] nvmem: sunxi_sid: Optimize register read-out method Chen-Yu Tsai
2019-03-18  7:33 ` [PATCH 3/6] nvmem: sunxi_sid: Dynamically allocate nvmem_config structure Chen-Yu Tsai
2019-03-18  7:33 ` [PATCH 4/6] nvmem: sunxi_sid: Read out data in native format Chen-Yu Tsai
2019-03-18  8:42   ` Maxime Ripard
2019-03-18  8:45     ` Chen-Yu Tsai
2019-03-18  8:57       ` Maxime Ripard
2019-03-18  9:09         ` Chen-Yu Tsai
2019-03-18  9:25           ` Maxime Ripard [this message]
2019-03-18  7:33 ` [PATCH 5/6] nvmem: sunxi_sid: Support SID on A83T and H5 Chen-Yu Tsai
2019-03-18  7:33 ` [PATCH 6/6] ARM: dts: sunxi: h3/h5: Add device node for SID Chen-Yu Tsai
2019-03-19  1:55   ` [linux-sunxi] " Samuel Holland
2019-03-19  3:17     ` Chen-Yu Tsai
2019-03-20 14:25 ` [PATCH 0/6] nvmem: sunxi_sid: native format and A83T/H5 support Srinivas Kandagatla
2019-03-21  9:06   ` Chen-Yu Tsai

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