From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D6D8C4360F for ; Thu, 21 Mar 2019 21:00:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3BF12218FC for ; Thu, 21 Mar 2019 21:00:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727508AbfCUVAY (ORCPT ); Thu, 21 Mar 2019 17:00:24 -0400 Received: from mga18.intel.com ([134.134.136.126]:34984 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727304AbfCUU7e (ORCPT ); Thu, 21 Mar 2019 16:59:34 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Mar 2019 13:59:32 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.60,254,1549958400"; d="scan'208";a="154548148" Received: from otc-icl-cdi187.jf.intel.com ([10.54.55.103]) by fmsmga004.fm.intel.com with ESMTP; 21 Mar 2019 13:59:32 -0700 From: kan.liang@linux.intel.com To: peterz@infradead.org, acme@kernel.org, mingo@redhat.com, linux-kernel@vger.kernel.org Cc: tglx@linutronix.de, jolsa@kernel.org, eranian@google.com, alexander.shishkin@linux.intel.com, ak@linux.intel.com, Kan Liang Subject: [PATCH V2 16/23] perf/x86/intel: Set correct weight for topdown subevent counters Date: Thu, 21 Mar 2019 13:56:56 -0700 Message-Id: <20190321205703.4256-17-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190321205703.4256-1-kan.liang@linux.intel.com> References: <20190321205703.4256-1-kan.liang@linux.intel.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Andi Kleen The top down sub event counters are mapped to a fixed counter, but should have the normal weight for the scheduler. So special case this. Signed-off-by: Andi Kleen Signed-off-by: Kan Liang --- No changes since V1. arch/x86/events/intel/core.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 6a8a221dc188..31e4e283e7c5 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -5081,6 +5081,15 @@ __init int intel_pmu_init(void) * counter, so do not extend mask to generic counters */ for_each_event_constraint(c, x86_pmu.event_constraints) { + /* + * Don't limit the event mask for topdown sub event + * counters. + */ + if (x86_pmu.num_counters_fixed >= 3 && + c->idxmsk64 & INTEL_PMC_MSK_ANY_SLOTS) { + c->weight = hweight64(c->idxmsk64); + continue; + } if (c->cmask == FIXED_EVENT_FLAGS && c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES) { c->idxmsk64 |= (1ULL << x86_pmu.num_counters) - 1; -- 2.17.1