[PATCH 0/4] Fix imx8mq ratio 1:1 check

[PATCH 0/4] Fix imx8mq ratio 1:1 check

[Angus Ainslie (Purism)]

The imx8mq 1:1 check breaks some earlier imx chips so limit the
ratio check to the imx8mq.

Angus Ainslie (Purism) (4):
  arm64: dts: imx8mq: Fix the fsl,imx8mq-sdma compatible string
  dmaengine: imx-sdma: Add clock ratio 1:1 check
  dt-bindings: Document the new imx8mq-sdma compatible string
  arm64: dts: imx8mq: Change ahb clock for imx8mq

 .../devicetree/bindings/dma/fsl-imx-sdma.txt  |  1 +
 arch/arm64/boot/dts/freescale/imx8mq.dtsi     |  4 +--
 drivers/dma/imx-sdma.c                        | 31 ++++++++++++++++---
 3 files changed, 30 insertions(+), 6 deletions(-)

-- 
2.17.1

[PATCH 1/4] arm64: dts: imx8mq: Fix the fsl,imx8mq-sdma compatible string

[Angus Ainslie (Purism)]

Fix a typo in the compatible string

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 81d5ce1b1ec1..07099f82965e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -720,7 +720,7 @@
 			};
 
 			sdma1: sdma@30bd0000 {
-				compatible = "fsl, imx8mq-sdma","fsl,imx7d-sdma";
+				compatible = "fsl,mx8mq-sdma","fsl,imx7d-sdma";
 				reg = <0x30bd0000 0x10000>;
 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
-- 
2.17.1

[PATCH 2/4] dmaengine: imx-sdma: Add clock ratio 1:1 check

[Angus Ainslie (Purism)]

On imx8mq B0 chip, AHB/SDMA clock ratio 2:1 can't be supported,
since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
to 500Mhz, so use 1:1 instead.

To limit this change to the imx8mq for now this patch also adds an
im8mq-sdma compatible string.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
 drivers/dma/imx-sdma.c | 31 +++++++++++++++++++++++++++----
 1 file changed, 27 insertions(+), 4 deletions(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 7fae4bf885d5..99d9f431ae2c 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -419,6 +419,7 @@ struct sdma_driver_data {
 	int chnenbl0;
 	int num_events;
 	struct sdma_script_start_addrs	*script_addrs;
+	bool check_ratio;
 };
 
 struct sdma_engine {
@@ -441,6 +442,8 @@ struct sdma_engine {
 	unsigned int			irq;
 	dma_addr_t			bd0_phys;
 	struct sdma_buffer_descriptor	*bd0;
+	/* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/
+	bool				clk_ratio;
 };
 
 static int sdma_config_write(struct dma_chan *chan,
@@ -555,6 +558,13 @@ static struct sdma_driver_data sdma_imx7d = {
 	.script_addrs = &sdma_script_imx7d,
 };
 
+static struct sdma_driver_data sdma_imx8mq = {
+	.chnenbl0 = SDMA_CHNENBL0_IMX35,
+	.num_events = 48,
+	.script_addrs = &sdma_script_imx7d,
+	.check_ratio = 1,
+};
+
 static const struct platform_device_id sdma_devtypes[] = {
 	{
 		.name = "imx25-sdma",
@@ -577,6 +587,9 @@ static const struct platform_device_id sdma_devtypes[] = {
 	}, {
 		.name = "imx7d-sdma",
 		.driver_data = (unsigned long)&sdma_imx7d,
+	}, {
+		.name = "imx8mq-sdma",
+		.driver_data = (unsigned long)&sdma_imx8mq,
 	}, {
 		/* sentinel */
 	}
@@ -591,6 +604,7 @@ static const struct of_device_id sdma_dt_ids[] = {
 	{ .compatible = "fsl,imx31-sdma", .data = &sdma_imx31, },
 	{ .compatible = "fsl,imx25-sdma", .data = &sdma_imx25, },
 	{ .compatible = "fsl,imx7d-sdma", .data = &sdma_imx7d, },
+	{ .compatible = "fsl,imx8mq-sdma", .data = &sdma_imx8mq, },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, sdma_dt_ids);
@@ -663,8 +677,11 @@ static int sdma_run_channel0(struct sdma_engine *sdma)
 		dev_err(sdma->dev, "Timeout waiting for CH0 ready\n");
 
 	/* Set bits of CONFIG register with dynamic context switching */
-	if (readl(sdma->regs + SDMA_H_CONFIG) == 0)
-		writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
+	reg = readl(sdma->regs + SDMA_H_CONFIG);
+	if ((reg & SDMA_H_CONFIG_CSM) == 0) {
+		reg |= SDMA_H_CONFIG_CSM;
+		writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG);
+	}
 
 	return ret;
 }
@@ -1847,6 +1864,10 @@ static int sdma_init(struct sdma_engine *sdma)
 	if (ret)
 		goto disable_clk_ipg;
 
+	if (sdma->drvdata->check_ratio &&
+	    (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma->clk_ipg)))
+		sdma->clk_ratio = 1;
+
 	/* Be sure SDMA has not started yet */
 	writel_relaxed(0, sdma->regs + SDMA_H_C0PTR);
 
@@ -1887,8 +1908,10 @@ static int sdma_init(struct sdma_engine *sdma)
 	writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR);
 
 	/* Set bits of CONFIG register but with static context switching */
-	/* FIXME: Check whether to set ACR bit depending on clock ratios */
-	writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
+	if (sdma->clk_ratio)
+		writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs + SDMA_H_CONFIG);
+	else
+		writel_relaxed(0, sdma->regs + SDMA_H_CONFIG);
 
 	writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);
 
-- 
2.17.1

[PATCH 3/4] dt-bindings: Document the new imx8mq-sdma compatible string

[Angus Ainslie (Purism)]

The imx8mq needs to be specified to check the clk ratio.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
 Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
index 3c9a57a8443b..9d8bbac27d8b 100644
--- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
@@ -9,6 +9,7 @@ Required properties:
       "fsl,imx53-sdma"
       "fsl,imx6q-sdma"
       "fsl,imx7d-sdma"
+      "fsl,imx8mq-sdma"
   The -to variants should be preferred since they allow to determine the
   correct ROM script addresses needed for the driver to work without additional
   firmware.
-- 
2.17.1

[PATCH 4/4] arm64: dts: imx8mq: Change ahb clock for imx8mq

[Angus Ainslie (Purism)]

Set ahb clock on sdma1 to get rid of "Timeout waiting for CH0"
on the imx8mq.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 07099f82965e..cd0f9eed9e9c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -724,7 +724,7 @@
 				reg = <0x30bd0000 0x10000>;
 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
-					 <&clk IMX8MQ_CLK_SDMA1_ROOT>;
+					 <&clk IMX8MQ_CLK_AHB>;
 				clock-names = "ipg", "ahb";
 				#dma-cells = <3>;
 				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
-- 
2.17.1

Re: [PATCH 1/4] arm64: dts: imx8mq: Fix the fsl,imx8mq-sdma compatible string

[Daniel Baluta]

On Thu, 2019-03-28 at 06:38 -0700, Angus Ainslie (Purism) wrote:
> Fix a typo in the compatible string
> 
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>


Reviwed-by: Daniel Baluta <daniel.baluta@nxp.com>

Re: [PATCH 3/4] dt-bindings: Document the new imx8mq-sdma compatible string

[Daniel Baluta]

On Thu, Mar 28, 2019 at 3:41 PM Angus Ainslie (Purism) <angus@akkea.ca> wrote:
>
> The imx8mq needs to be specified to check the clk ratio.
>
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
> ---
>  Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
> index 3c9a57a8443b..9d8bbac27d8b 100644
> --- a/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
> +++ b/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
> @@ -9,6 +9,7 @@ Required properties:
>        "fsl,imx53-sdma"
>        "fsl,imx6q-sdma"
>        "fsl,imx7d-sdma"
> +      "fsl,imx8mq-sdma"

You can drop this patch. It is already in Shwan's for-next branch.

The joy of working in parallel on similar things.

thanks,
Daniel.

Re: [PATCH 2/4] dmaengine: imx-sdma: Add clock ratio 1:1 check

[Fabio Estevam]

Hi Angus,

On Thu, Mar 28, 2019 at 10:39 AM Angus Ainslie (Purism) <angus@akkea.ca> wrote:
>
> On imx8mq B0 chip, AHB/SDMA clock ratio 2:1 can't be supported,
> since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
> to 500Mhz, so use 1:1 instead.
>
> To limit this change to the imx8mq for now this patch also adds an
> im8mq-sdma compatible string.
>
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

This has already been applied and it is in linux-next:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?h=next-20190328&id=25aaa75df1e659901d77085bcdd25eaabf265688

Please send an incremental fix instead.

RE: [PATCH 1/4] arm64: dts: imx8mq: Fix the fsl,imx8mq-sdma compatible string

[Aisheng Dong]

> From: Angus Ainslie (Purism) [mailto:angus@akkea.ca]
> Sent: Thursday, March 28, 2019 9:38 PM
> 
> Fix a typo in the compatible string
> 
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
> ---
>  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 81d5ce1b1ec1..07099f82965e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -720,7 +720,7 @@
>  			};
> 
>  			sdma1: sdma@30bd0000 {
> -				compatible = "fsl, imx8mq-sdma","fsl,imx7d-sdma";
> +				compatible = "fsl,mx8mq-sdma","fsl,imx7d-sdma";

This is a bit strange.
If binding doc says like that, probably we'd better fix the typo in binding doc
to use the same style.

Regards
Dong Aisheng

>  				reg = <0x30bd0000 0x10000>;
>  				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
>  				clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
> --
> 2.17.1

Re: [PATCH 1/4] arm64: dts: imx8mq: Fix the fsl,imx8mq-sdma compatible string

[Daniel Baluta]

On Fri, Mar 29, 2019 at 11:11 AM Aisheng Dong <aisheng.dong@nxp.com> wrote:
>
> > From: Angus Ainslie (Purism) [mailto:angus@akkea.ca]
> > Sent: Thursday, March 28, 2019 9:38 PM
> >
> > Fix a typo in the compatible string
> >
> > Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > index 81d5ce1b1ec1..07099f82965e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > @@ -720,7 +720,7 @@
> >                       };
> >
> >                       sdma1: sdma@30bd0000 {
> > -                             compatible = "fsl, imx8mq-sdma","fsl,imx7d-sdma";
> > +                             compatible = "fsl,mx8mq-sdma","fsl,imx7d-sdma";
>
> This is a bit strange.
> If binding doc says like that, probably we'd better fix the typo in binding doc
> to use the same style.

Oh, indeed.

Angus, shouldn't this be fsl,imx8mq-sdma instead of fsl,mx8mq-sdma. I
was just paying
attention to the extra space in my patch.

Re: [PATCH 1/4] arm64: dts: imx8mq: Fix the fsl,imx8mq-sdma compatible string

[Angus Ainslie]

On 2019-03-29 04:20, Daniel Baluta wrote:
> On Fri, Mar 29, 2019 at 11:11 AM Aisheng Dong <aisheng.dong@nxp.com> 
> wrote:
>> 
>> > From: Angus Ainslie (Purism) [mailto:angus@akkea.ca]
>> > Sent: Thursday, March 28, 2019 9:38 PM
>> >
>> > Fix a typo in the compatible string
>> >
>> > Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
>> > ---
>> >  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
>> > b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
>> > index 81d5ce1b1ec1..07099f82965e 100644
>> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
>> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
>> > @@ -720,7 +720,7 @@
>> >                       };
>> >
>> >                       sdma1: sdma@30bd0000 {
>> > -                             compatible = "fsl, imx8mq-sdma","fsl,imx7d-sdma";
>> > +                             compatible = "fsl,mx8mq-sdma","fsl,imx7d-sdma";
>> 
>> This is a bit strange.
>> If binding doc says like that, probably we'd better fix the typo in 
>> binding doc
>> to use the same style.
> 
> Oh, indeed.
> 
> Angus, shouldn't this be fsl,imx8mq-sdma instead of fsl,mx8mq-sdma. I
> was just paying
> attention to the extra space in my patch.

Correct I took too many characters when I dropped the space. I'll fix it 
for v2.

Angus

[PATCH v2 0/3] Fix imx8mq ratio 1:1 check

[Angus Ainslie (Purism)]

The imx8mq 1:1 check breaks some earlier imx chips so limit the
ratio check to the imx8mq.

Changes since v1:
Use the correct compatible string when fixing things.
Just add the imx8mq parts to the ratio check.
Drop the dt bindings update.

Angus Ainslie (Purism) (3):
  arm64: dts: imx8mq: Fix the fsl,imx8mq-sdma compatible string
  dmaengine: imx-sdma: Only check ratio on parts that support 1:1
  arm64: dts: imx8mq: Change ahb clock for imx8mq

 arch/arm64/boot/dts/freescale/imx8mq.dtsi |  4 ++--
 drivers/dma/imx-sdma.c                    | 15 ++++++++++++++-
 2 files changed, 16 insertions(+), 3 deletions(-)

-- 
2.17.1

[PATCH v2 1/3] arm64: dts: imx8mq: Fix the fsl,imx8mq-sdma compatible string

[Angus Ainslie (Purism)]

Fix a typo in the compatible string

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 81d5ce1b1ec1..06158625f24f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -720,7 +720,7 @@
 			};
 
 			sdma1: sdma@30bd0000 {
-				compatible = "fsl, imx8mq-sdma","fsl,imx7d-sdma";
+				compatible = "fsl,imx8mq-sdma","fsl,imx7d-sdma";
 				reg = <0x30bd0000 0x10000>;
 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
-- 
2.17.1

[PATCH v2 2/3] dmaengine: imx-sdma: Only check ratio on parts that support 1:1

[Angus Ainslie (Purism)]

On imx8mq B0 chip, AHB/SDMA clock ratio 2:1 can't be supported,
since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
to 500Mhz, so use 1:1 instead.

To limit this change to the imx8mq for now this patch also adds an
im8mq-sdma compatible string.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
 drivers/dma/imx-sdma.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 5f3c1378b90e..99d9f431ae2c 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -419,6 +419,7 @@ struct sdma_driver_data {
 	int chnenbl0;
 	int num_events;
 	struct sdma_script_start_addrs	*script_addrs;
+	bool check_ratio;
 };
 
 struct sdma_engine {
@@ -557,6 +558,13 @@ static struct sdma_driver_data sdma_imx7d = {
 	.script_addrs = &sdma_script_imx7d,
 };
 
+static struct sdma_driver_data sdma_imx8mq = {
+	.chnenbl0 = SDMA_CHNENBL0_IMX35,
+	.num_events = 48,
+	.script_addrs = &sdma_script_imx7d,
+	.check_ratio = 1,
+};
+
 static const struct platform_device_id sdma_devtypes[] = {
 	{
 		.name = "imx25-sdma",
@@ -579,6 +587,9 @@ static const struct platform_device_id sdma_devtypes[] = {
 	}, {
 		.name = "imx7d-sdma",
 		.driver_data = (unsigned long)&sdma_imx7d,
+	}, {
+		.name = "imx8mq-sdma",
+		.driver_data = (unsigned long)&sdma_imx8mq,
 	}, {
 		/* sentinel */
 	}
@@ -593,6 +604,7 @@ static const struct of_device_id sdma_dt_ids[] = {
 	{ .compatible = "fsl,imx31-sdma", .data = &sdma_imx31, },
 	{ .compatible = "fsl,imx25-sdma", .data = &sdma_imx25, },
 	{ .compatible = "fsl,imx7d-sdma", .data = &sdma_imx7d, },
+	{ .compatible = "fsl,imx8mq-sdma", .data = &sdma_imx8mq, },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, sdma_dt_ids);
@@ -1852,7 +1864,8 @@ static int sdma_init(struct sdma_engine *sdma)
 	if (ret)
 		goto disable_clk_ipg;
 
-	if (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma->clk_ipg))
+	if (sdma->drvdata->check_ratio &&
+	    (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma->clk_ipg)))
 		sdma->clk_ratio = 1;
 
 	/* Be sure SDMA has not started yet */
-- 
2.17.1

[PATCH v2 3/3] arm64: dts: imx8mq: Change ahb clock for imx8mq

[Angus Ainslie (Purism)]

Set ahb clock on sdma1 to get rid of "Timeout waiting for CH0"
on the imx8mq.

Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
---
 arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 06158625f24f..7233d9a315b8 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -724,7 +724,7 @@
 				reg = <0x30bd0000 0x10000>;
 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 				clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
-					 <&clk IMX8MQ_CLK_SDMA1_ROOT>;
+					 <&clk IMX8MQ_CLK_AHB>;
 				clock-names = "ipg", "ahb";
 				#dma-cells = <3>;
 				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
-- 
2.17.1

Re: [PATCH v2 1/3] arm64: dts: imx8mq: Fix the fsl,imx8mq-sdma compatible string

[Daniel Baluta]

On Fri, Mar 29, 2019 at 5:22 PM Angus Ainslie (Purism) <angus@akkea.ca> wrote:
>
> Fix a typo in the compatible string
>
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>

> ---
>  arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 81d5ce1b1ec1..06158625f24f 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -720,7 +720,7 @@
>                         };
>
>                         sdma1: sdma@30bd0000 {
> -                               compatible = "fsl, imx8mq-sdma","fsl,imx7d-sdma";
> +                               compatible = "fsl,imx8mq-sdma","fsl,imx7d-sdma";
>                                 reg = <0x30bd0000 0x10000>;
>                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
>                                 clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>,
> --
> 2.17.1
>

Re: [PATCH v2 1/3] arm64: dts: imx8mq: Fix the fsl,imx8mq-sdma compatible string

[Shawn Guo]

On Fri, Mar 29, 2019 at 08:21:28AM -0700, Angus Ainslie (Purism) wrote:
> Fix a typo in the compatible string
> 
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Applied, thanks.

Re: [PATCH v2 3/3] arm64: dts: imx8mq: Change ahb clock for imx8mq

[Shawn Guo]

On Fri, Mar 29, 2019 at 08:21:30AM -0700, Angus Ainslie (Purism) wrote:
> Set ahb clock on sdma1 to get rid of "Timeout waiting for CH0"
> on the imx8mq.
> 
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>

Applied, thanks.

Re: [PATCH v2 2/3] dmaengine: imx-sdma: Only check ratio on parts that support 1:1

[Robin Gong]

Acked-by: Robin Gong <yibin.gong@nxp.com>
On 2019-03-29 at 15:21 +0000, Angus Ainslie (Purism) wrote:
> On imx8mq B0 chip, AHB/SDMA clock ratio 2:1 can't be supported,
> since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
> to 500Mhz, so use 1:1 instead.
> 
> To limit this change to the imx8mq for now this patch also adds an
> im8mq-sdma compatible string.
> 
> Signed-off-by: Angus Ainslie (Purism) <angus@akkea.ca>
> ---
>  drivers/dma/imx-sdma.c | 15 ++++++++++++++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> index 5f3c1378b90e..99d9f431ae2c 100644
> --- a/drivers/dma/imx-sdma.c
> +++ b/drivers/dma/imx-sdma.c
> @@ -419,6 +419,7 @@ struct sdma_driver_data {
>  	int chnenbl0;
>  	int num_events;
>  	struct sdma_script_start_addrs	*script_addrs;
> +	bool check_ratio;
>  };
>  
>  struct sdma_engine {
> @@ -557,6 +558,13 @@ static struct sdma_driver_data sdma_imx7d = {
>  	.script_addrs = &sdma_script_imx7d,
>  };
>  
> +static struct sdma_driver_data sdma_imx8mq = {
> +	.chnenbl0 = SDMA_CHNENBL0_IMX35,
> +	.num_events = 48,
> +	.script_addrs = &sdma_script_imx7d,
> +	.check_ratio = 1,
> +};
> +
>  static const struct platform_device_id sdma_devtypes[] = {
>  	{
>  		.name = "imx25-sdma",
> @@ -579,6 +587,9 @@ static const struct platform_device_id
> sdma_devtypes[] = {
>  	}, {
>  		.name = "imx7d-sdma",
>  		.driver_data = (unsigned long)&sdma_imx7d,
> +	}, {
> +		.name = "imx8mq-sdma",
> +		.driver_data = (unsigned long)&sdma_imx8mq,
>  	}, {
>  		/* sentinel */
>  	}
> @@ -593,6 +604,7 @@ static const struct of_device_id sdma_dt_ids[] =
> {
>  	{ .compatible = "fsl,imx31-sdma", .data = &sdma_imx31, },
>  	{ .compatible = "fsl,imx25-sdma", .data = &sdma_imx25, },
>  	{ .compatible = "fsl,imx7d-sdma", .data = &sdma_imx7d, },
> +	{ .compatible = "fsl,imx8mq-sdma", .data = &sdma_imx8mq, },
>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, sdma_dt_ids);
> @@ -1852,7 +1864,8 @@ static int sdma_init(struct sdma_engine *sdma)
>  	if (ret)
>  		goto disable_clk_ipg;
>  
> -	if (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma-
> >clk_ipg))
> +	if (sdma->drvdata->check_ratio &&
> +	    (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma-
> >clk_ipg)))
>  		sdma->clk_ratio = 1;
>  
>  	/* Be sure SDMA has not started yet */

Re: [PATCH v2 2/3] dmaengine: imx-sdma: Only check ratio on parts that support 1:1

[Vinod Koul]

On 29-03-19, 08:21, Angus Ainslie (Purism) wrote:
> On imx8mq B0 chip, AHB/SDMA clock ratio 2:1 can't be supported,
> since SDMA clock ratio has to be increased to 250Mhz, AHB can't reach
> to 500Mhz, so use 1:1 instead.
> 
> To limit this change to the imx8mq for now this patch also adds an
> im8mq-sdma compatible string.

Applied, thanks

-- 
~Vinod