From: Sean Christopherson <sean.j.christopherson@intel.com>
To: Yang Weijiang <weijiang.yang@intel.com>
Cc: pbonzini@redhat.com, kvm@vger.kernel.org, mst@redhat.com,
rkrcmar@redhat.com, jmattson@google.com,
linux-kernel@vger.kernel.org, yu-cheng.yu@intel.com
Subject: Re: [RFC PATCH v4 8/8] KVM:x86: Add user-space read/write interface for CET MSRs
Date: Tue, 2 Apr 2019 13:35:45 -0700 [thread overview]
Message-ID: <20190402203545.GK31303@linux.intel.com> (raw)
In-Reply-To: <20190318150351.15550-9-weijiang.yang@intel.com>
On Mon, Mar 18, 2019 at 11:03:51PM +0800, Yang Weijiang wrote:
> When VMExit occurs, the Guest CET MSRs are stored in two different
> places, U_CET/PL0_SSP/PL1_SSP/PL2_SSP/PL3_SSP are stored in fpu
> xsave area, they are operated by XSAVES/XRSTORS, so before access
> these MSRs, kvm_load_guest_fpu is required to restore them to Host MSRs.
> After finish operation, need to restore Host MSRs by kvm_put_guest_fpu,
> these two functions are call in __msr_io(). S_CET and INTR_SSP_TABLE
> are stored in VMCS fields, so they can be access via vmcs_read/vmcs_write
> directly.
Hmm, the changelog reads like the kvm_load_guest_fpu() behavior is
introduced in this patch. It should be reworded to make it more obvious
that a previous patch handled that behavior. Alternatively, just fold
this into said previous patch.
>
> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com>
> ---
> arch/x86/include/asm/msr-index.h | 2 ++
> arch/x86/kvm/vmx.c | 42 ++++++++++++++++++++++++++++++++
> 2 files changed, 44 insertions(+)
>
> diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
> index 298721ff00f4..cc94ab14a946 100644
> --- a/arch/x86/include/asm/msr-index.h
> +++ b/arch/x86/include/asm/msr-index.h
> @@ -782,6 +782,8 @@
> #define MSR_IA32_U_CET 0x6a0 /* user mode cet setting */
> #define MSR_IA32_S_CET 0x6a2 /* kernel mode cet setting */
> #define MSR_IA32_PL0_SSP 0x6a4 /* kernel shstk pointer */
> +#define MSR_IA32_PL1_SSP 0x6a5 /* ring 1 shstk pointer */
> +#define MSR_IA32_PL2_SSP 0x6a6 /* ring 2 shstk pointer */
> #define MSR_IA32_PL3_SSP 0x6a7 /* user shstk pointer */
> #define MSR_IA32_INT_SSP_TAB 0x6a8 /* exception shstk table */
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 816e11a66557..5923b89fe120 100644
> --- a/arch/x86/kvm/vmx.c
> +++ b/arch/x86/kvm/vmx.c
> @@ -4153,6 +4153,27 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> return 1;
> msr_info->data = vcpu->arch.ia32_xss;
> break;
> + case MSR_IA32_S_CET:
> + msr_info->data = vmcs_readl(GUEST_S_CET);
> + break;
> + case MSR_IA32_U_CET:
> + rdmsrl(MSR_IA32_U_CET, msr_info->data);
> + break;
> + case MSR_IA32_INT_SSP_TAB:
> + msr_info->data = vmcs_readl(GUEST_INTR_SSP_TABLE);
> + break;
> + case MSR_IA32_PL0_SSP:
> + rdmsrl(MSR_IA32_PL0_SSP, msr_info->data);
> + break;
> + case MSR_IA32_PL1_SSP:
> + rdmsrl(MSR_IA32_PL1_SSP, msr_info->data);
> + break;
> + case MSR_IA32_PL2_SSP:
> + rdmsrl(MSR_IA32_PL2_SSP, msr_info->data);
> + break;
> + case MSR_IA32_PL3_SSP:
> + rdmsrl(MSR_IA32_PL3_SSP, msr_info->data);
> + break;
> case MSR_TSC_AUX:
> if (!msr_info->host_initiated &&
> !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP))
> @@ -4337,6 +4358,27 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
> else
> clear_atomic_switch_msr(vmx, MSR_IA32_XSS);
> break;
> + case MSR_IA32_S_CET:
> + vmcs_writel(GUEST_S_CET, data);
> + break;
> + case MSR_IA32_U_CET:
> + wrmsrl(MSR_IA32_U_CET, data);
> + break;
> + case MSR_IA32_INT_SSP_TAB:
> + vmcs_writel(GUEST_INTR_SSP_TABLE, data);
> + break;
> + case MSR_IA32_PL0_SSP:
> + wrmsrl(MSR_IA32_PL0_SSP, data);
> + break;
> + case MSR_IA32_PL1_SSP:
> + wrmsrl(MSR_IA32_PL1_SSP, data);
> + break;
> + case MSR_IA32_PL2_SSP:
> + wrmsrl(MSR_IA32_PL2_SSP, data);
> + break;
> + case MSR_IA32_PL3_SSP:
> + wrmsrl(MSR_IA32_PL3_SSP, data);
> + break;
> case MSR_TSC_AUX:
> if (!msr_info->host_initiated &&
> !guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP))
> --
> 2.17.1
>
next prev parent reply other threads:[~2019-04-02 20:35 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-18 15:03 [RFC PATCH v4 0/8] This patch-set is to enable Guest CET support Yang Weijiang
2019-03-18 15:03 ` [RFC PATCH v4 1/8] KVM:VMX: Define CET VMCS fields and bits Yang Weijiang
2019-04-02 19:57 ` Sean Christopherson
2019-03-18 15:03 ` [RFC PATCH v4 2/8] KVM:CPUID: Add CET CPUID support for Guest Yang Weijiang
2019-04-02 20:21 ` Sean Christopherson
2019-04-02 20:40 ` Sean Christopherson
2019-03-18 15:03 ` [RFC PATCH v4 3/8] KVM:CPUID: Fix xsaves area size calculation for CPUID.(EAX=0xD,ECX=1) Yang Weijiang
2019-04-02 20:27 ` Sean Christopherson
2019-03-18 15:03 ` [RFC PATCH v4 4/8] KVM:VMX: Pass through host CET related MSRs to Guest Yang Weijiang
2019-04-02 20:27 ` Sean Christopherson
2019-04-02 20:46 ` Yang Weijiang
2019-03-18 15:03 ` [RFC PATCH v4 5/8] KVM:VMX: Load Guest CET via VMCS when CET is enabled in Guest Yang Weijiang
2019-04-02 20:30 ` Sean Christopherson
2019-03-18 15:03 ` [RFC PATCH v4 6/8] KVM:x86: Allow Guest to set supported bits in XSS Yang Weijiang
2019-03-18 15:03 ` [RFC PATCH v4 7/8] KVM:x86: load guest fpu state when accessing MSRs managed by XSAVES Yang Weijiang
2019-04-02 20:39 ` Sean Christopherson
2019-03-18 15:03 ` [RFC PATCH v4 8/8] KVM:x86: Add user-space read/write interface for CET MSRs Yang Weijiang
2019-04-02 20:35 ` Sean Christopherson [this message]
2019-03-25 20:45 ` [RFC PATCH v4 0/8] This patch-set is to enable Guest CET support Yang Weijiang
2019-03-26 22:31 ` Sean Christopherson
2019-04-02 20:10 ` Sean Christopherson
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