From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C54AC10F0F for ; Fri, 5 Apr 2019 02:43:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 581062171F for ; Fri, 5 Apr 2019 02:43:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1554432205; bh=w887v8sxzFbv/CsMamCuvj//gbnzSxEGIUB95ny3Yug=; h=From:To:Cc:Subject:In-Reply-To:Date:List-ID:From; b=x2WW7ryJ2/j9luNmI/Es1lWsbiPxaUNixajQJjN/xaRqquipZeW500CPsbZhCL8nQ uc2uVjSqUCS0SiBdFObKVV1hlzXdq5NCgdTRe1MWMcymzGGUPLF1Gwt9L3Nui4pvAu G/2PuYoxICS/6LfpwnYFldN+csd7960pm2ew17/Y= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729779AbfDECnX (ORCPT ); Thu, 4 Apr 2019 22:43:23 -0400 Received: from heliosphere.sirena.org.uk ([172.104.155.198]:45242 "EHLO heliosphere.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728735AbfDECnU (ORCPT ); Thu, 4 Apr 2019 22:43:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Date:Message-Id:In-Reply-To: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Id:List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner: List-Archive; bh=RPsuSXiJp8eJ2wLYwaPIG6LlDK/Z5J5+xdDQa/6lv7M=; b=FwfBgrY4PFZN zk8py91cRjauDQpNMz0GEDwo/ATrGFLKFTmxHpJbLMHog42HqXKqggECEo2PPDCCDcOxkAX6cBWfE 50fZdR94RtAAb3md7H+ZvZBtHLiUcpDbAmzyCfa26Xf1Q9WhaZT7mOLD8XK1mPBTM1AiMFxdxxWlq 1z4BY=; Received: from [147.50.13.10] (helo=finisterre.ee.mobilebroadband) by heliosphere.sirena.org.uk with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1hCEp1-0005EL-87; Fri, 05 Apr 2019 02:43:15 +0000 Received: by finisterre.ee.mobilebroadband (Postfix, from userid 1000) id 2A053441D3B; Fri, 5 Apr 2019 09:43:12 +0700 (+07) From: Mark Brown To: Jerome Brunet Cc: Mark Brown , Mark Brown , Liam Girdwood , Maxime Jourdan , devicetree@vger.kernel.org, alsa-devel@alsa-project.org, Kevin Hilman , linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, alsa-devel@alsa-project.org Subject: Applied "ASoC: meson: axg-frddr: add g12a support" to the asoc tree In-Reply-To: <20190404111733.28705-5-jbrunet@baylibre.com> X-Patchwork-Hint: ignore Message-Id: <20190405024312.2A053441D3B@finisterre.ee.mobilebroadband> Date: Fri, 5 Apr 2019 09:43:12 +0700 (+07) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The patch ASoC: meson: axg-frddr: add g12a support has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark >From fcced66f208d778aa2dea05910161689503c16bf Mon Sep 17 00:00:00 2001 From: Jerome Brunet Date: Thu, 4 Apr 2019 13:17:31 +0200 Subject: [PATCH] ASoC: meson: axg-frddr: add g12a support On the axg, frddr could only be connected to 1 downstream element, so the playback was possible on 1 interface only at a time. On the g12a, the frddr may connect and wait for the request of up to 3 downstream elements. With this, it possible for single playback to be played on several interfaces at the same time. Like the toddr fifo, the g12a frddr also need to take care of resetting the read pointer to the initial fifo address when preparing a playback. Signed-off-by: Jerome Brunet Signed-off-by: Mark Brown --- sound/soc/meson/axg-frddr.c | 143 +++++++++++++++++++++++++++++++++++- 1 file changed, 140 insertions(+), 3 deletions(-) diff --git a/sound/soc/meson/axg-frddr.c b/sound/soc/meson/axg-frddr.c index a6f6f6a2eca8..2b8807737b2b 100644 --- a/sound/soc/meson/axg-frddr.c +++ b/sound/soc/meson/axg-frddr.c @@ -3,7 +3,9 @@ // Copyright (c) 2018 BayLibre, SAS. // Author: Jerome Brunet -/* This driver implements the frontend playback DAI of AXG based SoCs */ +/* + * This driver implements the frontend playback DAI of AXG and G12A based SoCs + */ #include #include @@ -14,7 +16,29 @@ #include "axg-fifo.h" -#define CTRL0_FRDDR_PP_MODE BIT(30) +#define CTRL0_FRDDR_PP_MODE BIT(30) +#define CTRL0_SEL1_EN_SHIFT 3 +#define CTRL0_SEL2_SHIFT 4 +#define CTRL0_SEL2_EN_SHIFT 7 +#define CTRL0_SEL3_SHIFT 8 +#define CTRL0_SEL3_EN_SHIFT 11 +#define CTRL1_FRDDR_FORCE_FINISH BIT(12) + +static int g12a_frddr_dai_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct axg_fifo *fifo = snd_soc_dai_get_drvdata(dai); + + /* Reset the read pointer to the FIFO_INIT_ADDR */ + regmap_update_bits(fifo->map, FIFO_CTRL1, + CTRL1_FRDDR_FORCE_FINISH, 0); + regmap_update_bits(fifo->map, FIFO_CTRL1, + CTRL1_FRDDR_FORCE_FINISH, CTRL1_FRDDR_FORCE_FINISH); + regmap_update_bits(fifo->map, FIFO_CTRL1, + CTRL1_FRDDR_FORCE_FINISH, 0); + + return 0; +} static int axg_frddr_dai_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) @@ -119,10 +143,123 @@ static const struct axg_fifo_match_data axg_frddr_match_data = { .dai_drv = &axg_frddr_dai_drv }; +static const struct snd_soc_dai_ops g12a_frddr_ops = { + .prepare = g12a_frddr_dai_prepare, + .startup = axg_frddr_dai_startup, + .shutdown = axg_frddr_dai_shutdown, +}; + +static struct snd_soc_dai_driver g12a_frddr_dai_drv = { + .name = "FRDDR", + .playback = { + .stream_name = "Playback", + .channels_min = 1, + .channels_max = AXG_FIFO_CH_MAX, + .rates = AXG_FIFO_RATES, + .formats = AXG_FIFO_FORMATS, + }, + .ops = &g12a_frddr_ops, + .pcm_new = axg_frddr_pcm_new, +}; + +static const char * const g12a_frddr_sel_texts[] = { + "OUT 0", "OUT 1", "OUT 2", "OUT 3", "OUT 4", +}; + +static SOC_ENUM_SINGLE_DECL(g12a_frddr_sel1_enum, FIFO_CTRL0, CTRL0_SEL_SHIFT, + g12a_frddr_sel_texts); +static SOC_ENUM_SINGLE_DECL(g12a_frddr_sel2_enum, FIFO_CTRL0, CTRL0_SEL2_SHIFT, + g12a_frddr_sel_texts); +static SOC_ENUM_SINGLE_DECL(g12a_frddr_sel3_enum, FIFO_CTRL0, CTRL0_SEL3_SHIFT, + g12a_frddr_sel_texts); + +static const struct snd_kcontrol_new g12a_frddr_out1_demux = + SOC_DAPM_ENUM("Output Src 1", g12a_frddr_sel1_enum); +static const struct snd_kcontrol_new g12a_frddr_out2_demux = + SOC_DAPM_ENUM("Output Src 2", g12a_frddr_sel2_enum); +static const struct snd_kcontrol_new g12a_frddr_out3_demux = + SOC_DAPM_ENUM("Output Src 3", g12a_frddr_sel3_enum); + +static const struct snd_kcontrol_new g12a_frddr_out1_enable = + SOC_DAPM_SINGLE_AUTODISABLE("Switch", FIFO_CTRL0, + CTRL0_SEL1_EN_SHIFT, 1, 0); +static const struct snd_kcontrol_new g12a_frddr_out2_enable = + SOC_DAPM_SINGLE_AUTODISABLE("Switch", FIFO_CTRL0, + CTRL0_SEL2_EN_SHIFT, 1, 0); +static const struct snd_kcontrol_new g12a_frddr_out3_enable = + SOC_DAPM_SINGLE_AUTODISABLE("Switch", FIFO_CTRL0, + CTRL0_SEL3_EN_SHIFT, 1, 0); + +static const struct snd_soc_dapm_widget g12a_frddr_dapm_widgets[] = { + SND_SOC_DAPM_AIF_OUT("SRC 1", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("SRC 2", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("SRC 3", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_SWITCH("SRC 1 EN", SND_SOC_NOPM, 0, 0, + &g12a_frddr_out1_enable), + SND_SOC_DAPM_SWITCH("SRC 2 EN", SND_SOC_NOPM, 0, 0, + &g12a_frddr_out2_enable), + SND_SOC_DAPM_SWITCH("SRC 3 EN", SND_SOC_NOPM, 0, 0, + &g12a_frddr_out3_enable), + SND_SOC_DAPM_DEMUX("SINK 1 SEL", SND_SOC_NOPM, 0, 0, + &g12a_frddr_out1_demux), + SND_SOC_DAPM_DEMUX("SINK 2 SEL", SND_SOC_NOPM, 0, 0, + &g12a_frddr_out2_demux), + SND_SOC_DAPM_DEMUX("SINK 3 SEL", SND_SOC_NOPM, 0, 0, + &g12a_frddr_out3_demux), + SND_SOC_DAPM_AIF_OUT("OUT 0", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("OUT 1", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("OUT 2", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("OUT 3", NULL, 0, SND_SOC_NOPM, 0, 0), + SND_SOC_DAPM_AIF_OUT("OUT 4", NULL, 0, SND_SOC_NOPM, 0, 0), +}; + +static const struct snd_soc_dapm_route g12a_frddr_dapm_routes[] = { + { "SRC 1", NULL, "Playback" }, + { "SRC 2", NULL, "Playback" }, + { "SRC 3", NULL, "Playback" }, + { "SRC 1 EN", "Switch", "SRC 1" }, + { "SRC 2 EN", "Switch", "SRC 2" }, + { "SRC 3 EN", "Switch", "SRC 3" }, + { "SINK 1 SEL", NULL, "SRC 1 EN" }, + { "SINK 2 SEL", NULL, "SRC 2 EN" }, + { "SINK 3 SEL", NULL, "SRC 3 EN" }, + { "OUT 0", "OUT 0", "SINK 1 SEL" }, + { "OUT 1", "OUT 1", "SINK 1 SEL" }, + { "OUT 2", "OUT 2", "SINK 1 SEL" }, + { "OUT 3", "OUT 3", "SINK 1 SEL" }, + { "OUT 4", "OUT 4", "SINK 1 SEL" }, + { "OUT 0", "OUT 0", "SINK 2 SEL" }, + { "OUT 1", "OUT 1", "SINK 2 SEL" }, + { "OUT 2", "OUT 2", "SINK 2 SEL" }, + { "OUT 3", "OUT 3", "SINK 2 SEL" }, + { "OUT 4", "OUT 4", "SINK 2 SEL" }, + { "OUT 0", "OUT 0", "SINK 3 SEL" }, + { "OUT 1", "OUT 1", "SINK 3 SEL" }, + { "OUT 2", "OUT 2", "SINK 3 SEL" }, + { "OUT 3", "OUT 3", "SINK 3 SEL" }, + { "OUT 4", "OUT 4", "SINK 3 SEL" }, +}; + +static const struct snd_soc_component_driver g12a_frddr_component_drv = { + .dapm_widgets = g12a_frddr_dapm_widgets, + .num_dapm_widgets = ARRAY_SIZE(g12a_frddr_dapm_widgets), + .dapm_routes = g12a_frddr_dapm_routes, + .num_dapm_routes = ARRAY_SIZE(g12a_frddr_dapm_routes), + .ops = &g12a_fifo_pcm_ops +}; + +static const struct axg_fifo_match_data g12a_frddr_match_data = { + .component_drv = &g12a_frddr_component_drv, + .dai_drv = &g12a_frddr_dai_drv +}; + static const struct of_device_id axg_frddr_of_match[] = { { .compatible = "amlogic,axg-frddr", .data = &axg_frddr_match_data, + }, { + .compatible = "amlogic,g12a-frddr", + .data = &g12a_frddr_match_data, }, {} }; MODULE_DEVICE_TABLE(of, axg_frddr_of_match); @@ -136,6 +273,6 @@ static struct platform_driver axg_frddr_pdrv = { }; module_platform_driver(axg_frddr_pdrv); -MODULE_DESCRIPTION("Amlogic AXG playback fifo driver"); +MODULE_DESCRIPTION("Amlogic AXG/G12A playback fifo driver"); MODULE_AUTHOR("Jerome Brunet "); MODULE_LICENSE("GPL v2"); -- 2.20.1