From: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
To: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Cc: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"bp@suse.de" <bp@suse.de>,
"tony.luck@intel.com" <tony.luck@intel.com>,
"x86@kernel.org" <x86@kernel.org>
Subject: [PATCH 5/5] x86/MCE: Save MCA control bits that get set in hardware
Date: Sun, 7 Apr 2019 23:13:50 +0000 [thread overview]
Message-ID: <20190407231331.52362-6-Yazen.Ghannam@amd.com> (raw)
In-Reply-To: <20190407231331.52362-1-Yazen.Ghannam@amd.com>
From: Yazen Ghannam <yazen.ghannam@amd.com>
The OS is expected to write all bits in MCA_CTL. However, only
implemented bits get set in the hardware.
Read back MCA_CTL so that the value in the hardware is saved and
reported through sysfs.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
arch/x86/kernel/cpu/mce/core.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 4a066c1e8ab2..ed5374ab3ac3 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -1566,10 +1566,13 @@ static void __mcheck_cpu_init_clear_banks(void)
for (i = 0; i < this_cpu_read(num_banks); i++) {
struct mce_bank *b = &this_cpu_read(mce_banks)[i];
- if (!b->init)
- continue;
- wrmsrl(msr_ops.ctl(i), b->ctl);
- wrmsrl(msr_ops.status(i), 0);
+ if (b->init) {
+ wrmsrl(msr_ops.ctl(i), b->ctl);
+ wrmsrl(msr_ops.status(i), 0);
+ }
+
+ /* Save bits set in hardware. */
+ rdmsrl(msr_ops.ctl(i), b->ctl);
}
}
@@ -2313,8 +2316,10 @@ static void mce_reenable_cpu(void)
for (i = 0; i < this_cpu_read(num_banks); i++) {
struct mce_bank *b = &this_cpu_read(mce_banks)[i];
- if (b->init)
+ if (b->init) {
wrmsrl(msr_ops.ctl(i), b->ctl);
+ rdmsrl(msr_ops.ctl(i), b->ctl);
+ }
}
}
--
2.17.1
next prev parent reply other threads:[~2019-04-07 23:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-07 23:13 [PATCH 0/5] Handle MCA banks in a per_cpu way Ghannam, Yazen
2019-04-07 23:13 ` [PATCH 1/5] x86/MCE: Make struct mce_banks[] static Ghannam, Yazen
2019-04-07 23:13 ` [PATCH 2/5] x86/MCE: Handle MCA controls in a per_cpu way Ghannam, Yazen
2019-04-07 23:13 ` [PATCH 3/5] x86/MCE/AMD: Don't cache block addresses on SMCA systems Ghannam, Yazen
2019-04-07 23:13 ` [PATCH 4/5] x86/MCE: Make number of MCA banks per_cpu Ghannam, Yazen
2019-04-07 23:13 ` Ghannam, Yazen [this message]
2019-04-08 7:43 ` [PATCH 0/5] Handle MCA banks in a per_cpu way Borislav Petkov
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