From: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
To: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>
Cc: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"bp@suse.de" <bp@suse.de>,
"tony.luck@intel.com" <tony.luck@intel.com>,
"x86@kernel.org" <x86@kernel.org>
Subject: [PATCH RESEND 1/5] x86/MCE: Make struct mce_banks[] static
Date: Mon, 8 Apr 2019 14:12:15 +0000 [thread overview]
Message-ID: <20190408141205.12376-2-Yazen.Ghannam@amd.com> (raw)
In-Reply-To: <20190408141205.12376-1-Yazen.Ghannam@amd.com>
From: Yazen Ghannam <yazen.ghannam@amd.com>
The struct mce_banks[] array is only used in mce/core.c so move the
definition of struct mce_bank to mce/core.c and make the array static.
Also, change the "init" field to bool type.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
arch/x86/kernel/cpu/mce/core.c | 11 ++++++++++-
arch/x86/kernel/cpu/mce/internal.h | 10 ----------
2 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
index 58925e7ccb27..8d0d1e8425db 100644
--- a/arch/x86/kernel/cpu/mce/core.c
+++ b/arch/x86/kernel/cpu/mce/core.c
@@ -64,7 +64,16 @@ static DEFINE_MUTEX(mce_sysfs_mutex);
DEFINE_PER_CPU(unsigned, mce_exception_count);
-struct mce_bank *mce_banks __read_mostly;
+#define ATTR_LEN 16
+/* One object for each MCE bank, shared by all CPUs */
+struct mce_bank {
+ u64 ctl; /* subevents to enable */
+ bool init; /* initialise bank? */
+ struct device_attribute attr; /* device attribute */
+ char attrname[ATTR_LEN]; /* attribute name */
+};
+
+static struct mce_bank *mce_banks __read_mostly;
struct mce_vendor_flags mce_flags __read_mostly;
struct mca_config mca_cfg __read_mostly = {
diff --git a/arch/x86/kernel/cpu/mce/internal.h b/arch/x86/kernel/cpu/mce/internal.h
index af5eab1e65e2..032d52c66616 100644
--- a/arch/x86/kernel/cpu/mce/internal.h
+++ b/arch/x86/kernel/cpu/mce/internal.h
@@ -22,17 +22,8 @@ enum severity_level {
extern struct blocking_notifier_head x86_mce_decoder_chain;
-#define ATTR_LEN 16
#define INITIAL_CHECK_INTERVAL 5 * 60 /* 5 minutes */
-/* One object for each MCE bank, shared by all CPUs */
-struct mce_bank {
- u64 ctl; /* subevents to enable */
- unsigned char init; /* initialise bank? */
- struct device_attribute attr; /* device attribute */
- char attrname[ATTR_LEN]; /* attribute name */
-};
-
struct mce_evt_llist {
struct llist_node llnode;
struct mce mce;
@@ -47,7 +38,6 @@ struct llist_node *mce_gen_pool_prepare_records(void);
extern int (*mce_severity)(struct mce *a, int tolerant, char **msg, bool is_excp);
struct dentry *mce_get_debugfs_dir(void);
-extern struct mce_bank *mce_banks;
extern mce_banks_t mce_banks_ce_disabled;
#ifdef CONFIG_X86_MCE_INTEL
--
2.17.1
next prev parent reply other threads:[~2019-04-08 14:12 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-08 14:12 [PATCH RESEND 0/5] Handle MCA banks in a per_cpu way Ghannam, Yazen
2019-04-08 14:12 ` Ghannam, Yazen [this message]
2019-04-08 14:12 ` [PATCH RESEND 2/5] x86/MCE: Handle MCA controls " Ghannam, Yazen
2019-04-08 17:51 ` Borislav Petkov
2019-04-08 18:55 ` Ghannam, Yazen
2019-04-09 20:34 ` Borislav Petkov
2019-04-10 16:36 ` Ghannam, Yazen
2019-04-10 16:40 ` Borislav Petkov
2019-04-10 16:58 ` Ghannam, Yazen
2019-04-10 17:25 ` Borislav Petkov
2019-04-10 19:41 ` Ghannam, Yazen
2019-04-10 20:04 ` Borislav Petkov
2019-04-08 14:12 ` [PATCH RESEND 3/5] x86/MCE/AMD: Don't cache block addresses on SMCA systems Ghannam, Yazen
2019-04-08 14:12 ` [PATCH RESEND 4/5] x86/MCE: Make number of MCA banks per_cpu Ghannam, Yazen
2019-04-08 20:26 ` Luck, Tony
2019-04-08 20:34 ` Borislav Petkov
2019-04-08 20:42 ` Luck, Tony
2019-04-08 20:50 ` Borislav Petkov
2019-04-08 22:48 ` Ghannam, Yazen
2019-04-08 23:23 ` Luck, Tony
2019-04-08 23:37 ` Ghannam, Yazen
2019-04-09 11:38 ` Borislav Petkov
2019-04-08 14:12 ` [PATCH RESEND 5/5] x86/MCE: Save MCA control bits that get set in hardware Ghannam, Yazen
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