From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,UNPARSEABLE_RELAY, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B63CAC282DA for ; Tue, 9 Apr 2019 06:53:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8F53A2133D for ; Tue, 9 Apr 2019 06:53:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726589AbfDIGxk (ORCPT ); Tue, 9 Apr 2019 02:53:40 -0400 Received: from mailgw02.mediatek.com ([1.203.163.81]:15145 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726129AbfDIGxj (ORCPT ); Tue, 9 Apr 2019 02:53:39 -0400 X-UUID: 72200f652732458aa4486941c3c828db-20190409 X-UUID: 72200f652732458aa4486941c3c828db-20190409 Received: from mtkcas34.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 2065200759; Tue, 09 Apr 2019 14:53:19 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS33N2.mediatek.inc (172.27.4.76) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 9 Apr 2019 14:53:17 +0800 Received: from mszsdclx1067.gcn.mediatek.inc (172.27.4.253) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Tue, 9 Apr 2019 14:53:16 +0800 From: wangyan wang To: Michael Turquette , Stephen Boyd , CK Hu CC: wangyan wang , Matthias Brugger , Philipp Zabel , David Airlie , Daniel Vetter , chunhui dai , Colin Ian King , Sean Wang , Ryder Lee , , , , , , Subject: [PATCH V10 2/5] drm/mediatek: fix the rate and divder of hdmi phy for MT2701 Date: Tue, 9 Apr 2019 14:53:04 +0800 Message-ID: <20190409065307.82280-3-wangyan.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20190409065307.82280-1-wangyan.wang@mediatek.com> References: <20190409065307.82280-1-wangyan.wang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Wangyan Wang Due to a clerical error,there is one zero less for 12800000. Fix it for 128000000 Fixes: 0fc721b2968e ("drm/mediatek: add hdmi driver for MT2701 and MT7623") Reviewed-by: CK Hu Signed-off-by: Wangyan Wang --- drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c index 67a814649e19..844e622f052c 100644 --- a/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c +++ b/drivers/gpu/drm/mediatek/mtk_mt2701_hdmi_phy.c @@ -116,8 +116,8 @@ static int mtk_hdmi_pll_set_rate(struct clk_hw *hw, unsigned long rate, if (rate <= 64000000) pos_div = 3; - else if (rate <= 12800000) - pos_div = 1; + else if (rate <= 128000000) + pos_div = 2; else pos_div = 1; -- 2.14.1