From: Paul Walmsley <paul.walmsley@sifive.com>
To: linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org,
linux-riscv@lists.infradead.org, gregkh@linuxfoundation.org
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
Paul Walmsley <paul@pwsan.com>,
devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Palmer Dabbelt <palmer@sifive.com>
Subject: [PATCH v5 1/2] dt-bindings: serial: add documentation for the SiFive UART driver
Date: Fri, 12 Apr 2019 19:01:11 -0700 [thread overview]
Message-ID: <20190413020111.23400-2-paul.walmsley@sifive.com> (raw)
In-Reply-To: <20190413020111.23400-1-paul.walmsley@sifive.com>
Add DT binding documentation for the Linux driver for the SiFive
asynchronous serial IP block.
This revision incorporates changes based on feedback from Rob
Herring <robh@kernel.org>.
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: linux-serial@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
---
.../bindings/serial/sifive-serial.txt | 33 +++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt
diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt
new file mode 100644
index 000000000000..c86b1e524159
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt
@@ -0,0 +1,33 @@
+SiFive asynchronous serial interface (UART)
+
+Required properties:
+
+- compatible: should be something similar to
+ "sifive,<chip>-uart" for the UART as integrated
+ on a particular chip, and "sifive,uart<version>" for the
+ general UART IP block programming model. Supported
+ compatible strings as of the date of this writing are:
+ "sifive,fu540-c000-uart" for the SiFive UART v0 as
+ integrated onto the SiFive FU540 chip, or "sifive,uart0"
+ for the SiFive UART v0 IP block with no chip integration
+ tweaks (if any)
+- reg: address and length of the register space
+- interrupts: Should contain the UART interrupt identifier
+- clocks: Should contain a clock identifier for the UART's parent clock
+
+
+UART HDL that corresponds to the IP block version numbers can be found
+here:
+
+https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/uart
+
+
+Example:
+
+uart0: serial@10010000 {
+ compatible = "sifive,fu540-c000-uart", "sifive,uart0";
+ interrupt-parent = <&plic0>;
+ interrupts = <80>;
+ reg = <0x0 0x10010000 0x0 0x1000>;
+ clocks = <&prci PRCI_CLK_TLCLK>;
+};
--
2.20.1
next prev parent reply other threads:[~2019-04-13 2:01 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-13 2:01 [PATCH v5 0/2] tty: serial: add DT bindings and serial driver for the SiFive FU540 UART Paul Walmsley
2019-04-13 2:01 ` Paul Walmsley [this message]
2019-04-26 14:08 ` [PATCH v5 1/2] dt-bindings: serial: add documentation for the SiFive UART driver Rob Herring
2019-04-26 16:36 ` Paul Walmsley
2019-04-13 2:01 ` [PATCH v5 2/2] tty: serial: add driver for the SiFive UART Paul Walmsley
2019-05-02 18:58 ` Kevin Hilman
2019-04-18 23:22 ` [PATCH v5 0/2] tty: serial: add DT bindings and serial driver for the SiFive FU540 UART Kevin Hilman
2019-04-19 1:04 ` Atish Patra
2019-04-19 19:18 ` Kevin Hilman
2019-04-19 19:29 ` Atish Patra
2019-04-19 20:34 ` Kevin Hilman
2019-04-19 21:13 ` Paul Walmsley
2019-05-02 18:57 ` Kevin Hilman
2019-05-03 19:05 ` Paul Walmsley
2019-04-24 18:58 ` Paul Walmsley
2019-05-27 16:12 ` Loys Ollivier
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