From: "Paul E. McKenney" <paulmck@linux.ibm.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Alan Stern <stern@rowland.harvard.edu>,
LKMM Maintainers -- Akira Yokosawa <akiyks@gmail.com>,
Andrea Parri <andrea.parri@amarulasolutions.com>,
Boqun Feng <boqun.feng@gmail.com>,
Daniel Lustig <dlustig@nvidia.com>,
David Howells <dhowells@redhat.com>,
Jade Alglave <j.alglave@ucl.ac.uk>,
Luc Maranget <luc.maranget@inria.fr>,
Nicholas Piggin <npiggin@gmail.com>,
Will Deacon <will.deacon@arm.com>,
Kernel development list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] Documentation: atomic_t.txt: Explain ordering provided by smp_mb__{before,after}_atomic()
Date: Fri, 19 Apr 2019 11:26:20 -0700 [thread overview]
Message-ID: <20190419182620.GF14111@linux.ibm.com> (raw)
In-Reply-To: <20190419180017.GP4038@hirez.programming.kicks-ass.net>
On Fri, Apr 19, 2019 at 08:00:17PM +0200, Peter Zijlstra wrote:
> On Fri, Apr 19, 2019 at 01:21:45PM -0400, Alan Stern wrote:
> > Index: usb-devel/Documentation/atomic_t.txt
> > ===================================================================
> > --- usb-devel.orig/Documentation/atomic_t.txt
> > +++ usb-devel/Documentation/atomic_t.txt
> > @@ -171,7 +171,10 @@ The barriers:
> > smp_mb__{before,after}_atomic()
> >
> > only apply to the RMW ops and can be used to augment/upgrade the ordering
> > -inherent to the used atomic op. These barriers provide a full smp_mb().
> > +inherent to the used atomic op. Unlike normal smp_mb() barriers, they order
> > +only the RMW op itself against the instructions preceding the
> > +smp_mb__before_atomic() or following the smp_mb__after_atomic(); they do
> > +not order instructions on the other side of the RMW op at all.
>
> Now it is I who is confused; what?
>
> x = 1;
> smp_mb__before_atomic();
> atomic_add(1, &a);
> y = 1;
>
> the stores to both x and y will be ordered as if an smp_mb() where
> there. There is no order between a and y otoh.
Let's look at x86. And a slightly different example:
x = 1;
smp_mb__before_atomic();
atomic_add(1, &a);
r1 = y;
The atomic_add() asm does not have the "memory" constraint, which is
completely legitimate because atomic_add() does not return a value,
and thus guarantees no ordering. The compiler is therefore within
its rights to transform the code into the following:
x = 1;
smp_mb__before_atomic();
r1 = y;
atomic_add(1, &a);
But x86's smp_mb__before_atomic() is just a compiler barrier, and
x86 is further allowed to reorder prior stores with later loads.
The CPU can therefore execute this code as follows:
r1 = y;
x = 1;
smp_mb__before_atomic();
atomic_add(1, &a);
So in general, the ordering is guaranteed only to the atomic itself,
not to accesses on the other side of the atomic.
Thanx, Paul
next prev parent reply other threads:[~2019-04-19 18:26 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-19 17:21 [PATCH] Documentation: atomic_t.txt: Explain ordering provided by smp_mb__{before,after}_atomic() Alan Stern
2019-04-19 17:54 ` Paul E. McKenney
2019-04-19 18:00 ` Peter Zijlstra
2019-04-19 18:26 ` Paul E. McKenney [this message]
2019-04-20 0:26 ` Nicholas Piggin
2019-04-20 8:54 ` Paul E. McKenney
2019-04-23 12:17 ` Peter Zijlstra
2019-04-23 13:21 ` Paul E. McKenney
2019-04-23 13:26 ` Peter Zijlstra
2019-04-23 20:16 ` Paul E. McKenney
2019-04-23 20:28 ` Peter Zijlstra
2019-04-24 8:29 ` Paul E. McKenney
2019-04-24 8:44 ` Peter Zijlstra
2019-04-23 12:32 ` Peter Zijlstra
2019-04-23 13:30 ` Paul E. McKenney
2019-04-23 13:40 ` Peter Zijlstra
2019-04-23 20:19 ` Paul E. McKenney
2019-04-27 8:17 ` Andrea Parri
2019-04-27 8:36 ` Paul E. McKenney
2019-04-29 9:24 ` Johan Hovold
2019-04-29 14:49 ` Paul E. McKenney
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