From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.1 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD826C04E84 for ; Thu, 16 May 2019 11:49:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7D18E20848 for ; Thu, 16 May 2019 11:49:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1558007341; bh=BPwRZglwF9J+rpzxhoY1p4JujbqmzpsKuEcas2nSRh4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=X71iGymI/dnvIFKCfa+xglDe3xnOOiS6cq+nX/D9f4cFmSX8GlgZXwQI1RQIQOKeo L8wcJWrKDn08VKlJtyVIopg5RFKRz2XaOH6ZclrDKAL1ByXcMT8cn9M0lTdLl6q51N JztG6/sZ8Pwi5YifgQ6oG7fvIS7ZAHnOb7pCFMHo= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727426AbfEPLjs (ORCPT ); Thu, 16 May 2019 07:39:48 -0400 Received: from mail.kernel.org ([198.145.29.99]:47820 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727398AbfEPLjq (ORCPT ); Thu, 16 May 2019 07:39:46 -0400 Received: from sasha-vm.mshome.net (c-73-47-72-35.hsd1.nh.comcast.net [73.47.72.35]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id ED1942087E; Thu, 16 May 2019 11:39:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1558006785; bh=BPwRZglwF9J+rpzxhoY1p4JujbqmzpsKuEcas2nSRh4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cULI1kG9imt9xvSq0oqlgMWGfdJfmejIm2Y0M36MNZx7LbOZBgYnuxV7ZtNkwYt+Y NuqMKTXXJXmHlfNZRom8SbCQKcc7isksajbxnYalrGYuJPqaBEIQ2h+5M7Lt7G2SbR Ipe64InrQ39S/i02gcYKzNjkj8/IpU7lE2RxY4c0= From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Vineet Gupta , Sasha Levin , linux-snps-arc@lists.infradead.org Subject: [PATCH AUTOSEL 5.0 09/34] ARC: PAE40: don't panic and instead turn off hw ioc Date: Thu, 16 May 2019 07:39:06 -0400 Message-Id: <20190516113932.8348-9-sashal@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190516113932.8348-1-sashal@kernel.org> References: <20190516113932.8348-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vineet Gupta [ Upstream commit 99bd5fcc505d65ea9c60619202f0b2d926eabbe9 ] HSDK currently panics when built for HIGHMEM/ARC_HAS_PAE40 because ioc is enabled with default which doesn't work for the 2 non contiguous memory nodes. So get PAE working by disabling ioc instead. Tested with !PAE40 by forcing @ioc_enable=0 and running the glibc testsuite over ssh Signed-off-by: Vineet Gupta Signed-off-by: Sasha Levin --- arch/arc/mm/cache.c | 31 ++++++++++++++++--------------- 1 file changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/arc/mm/cache.c b/arch/arc/mm/cache.c index 4135abec3fb09..63e6e65046992 100644 --- a/arch/arc/mm/cache.c +++ b/arch/arc/mm/cache.c @@ -113,10 +113,24 @@ static void read_decode_cache_bcr_arcv2(int cpu) } READ_BCR(ARC_REG_CLUSTER_BCR, cbcr); - if (cbcr.c) + if (cbcr.c) { ioc_exists = 1; - else + + /* + * As for today we don't support both IOC and ZONE_HIGHMEM enabled + * simultaneously. This happens because as of today IOC aperture covers + * only ZONE_NORMAL (low mem) and any dma transactions outside this + * region won't be HW coherent. + * If we want to use both IOC and ZONE_HIGHMEM we can use + * bounce_buffer to handle dma transactions to HIGHMEM. + * Also it is possible to modify dma_direct cache ops or increase IOC + * aperture size if we are planning to use HIGHMEM without PAE. + */ + if (IS_ENABLED(CONFIG_HIGHMEM) || is_pae40_enabled()) + ioc_enable = 0; + } else { ioc_enable = 0; + } /* HS 2.0 didn't have AUX_VOL */ if (cpuinfo_arc700[cpu].core.family > 0x51) { @@ -1158,19 +1172,6 @@ noinline void __init arc_ioc_setup(void) if (!ioc_enable) return; - /* - * As for today we don't support both IOC and ZONE_HIGHMEM enabled - * simultaneously. This happens because as of today IOC aperture covers - * only ZONE_NORMAL (low mem) and any dma transactions outside this - * region won't be HW coherent. - * If we want to use both IOC and ZONE_HIGHMEM we can use - * bounce_buffer to handle dma transactions to HIGHMEM. - * Also it is possible to modify dma_direct cache ops or increase IOC - * aperture size if we are planning to use HIGHMEM without PAE. - */ - if (IS_ENABLED(CONFIG_HIGHMEM)) - panic("IOC and HIGHMEM can't be used simultaneously"); - /* Flush + invalidate + disable L1 dcache */ __dc_disable(); -- 2.20.1