From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47F63C28CBF for ; Mon, 27 May 2019 02:47:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1FEDB21707 for ; Mon, 27 May 2019 02:47:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=castello.eng.br header.i=@castello.eng.br header.b="vbhNYmxn" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726255AbfE0Crx (ORCPT ); Sun, 26 May 2019 22:47:53 -0400 Received: from gateway32.websitewelcome.com ([192.185.145.119]:36435 "EHLO gateway32.websitewelcome.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725996AbfE0Crw (ORCPT ); Sun, 26 May 2019 22:47:52 -0400 Received: from cm11.websitewelcome.com (cm11.websitewelcome.com [100.42.49.5]) by gateway32.websitewelcome.com (Postfix) with ESMTP id BFF4A2D7A9 for ; Sun, 26 May 2019 21:23:07 -0500 (CDT) Received: from br164.hostgator.com.br ([192.185.176.180]) by cmsmtp with SMTP id V5I3hcStjdnCeV5I3hHjHM; Sun, 26 May 2019 21:23:07 -0500 X-Authority-Reason: nr=8 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=castello.eng.br; s=default; h=Content-Transfer-Encoding:MIME-Version: References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help: List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=DjiT6spjsKDIpnean9GW3/j0VKR3Gp9YxvRmyOO5my8=; b=vbhNYmxnywP/GJ9lxudWlfUCeR JlvaEQvUN6BUH4h7SneQRyj1HLBrc2xsHIje4rKPVgUtT8zRSehgw9q2DK7p+Ik/yHR8ucUvSWC9G DRe95Tc0HWxmEgJqfj+RmxJHwCE2SbqfQLHp7HC3XaEnB1IA5UASOvPK6YjZ83qki4dDxA+OYCJkA MYUT54moR6B9gLsaXkzjolGkQT+FxiNdsJaNgGYQhTmNMu4kyJ5lpDblNhlomJdIXDht8f5H7VzSS ewokowSUqRa8w7rzk89IVx3Sj4X13EtkTHyAyg6xi0VgctScCxNmWdfrV1H2w+kxfuAWHMV/+fVtb G2R6aaig==; Received: from [177.34.20.96] (port=57660 helo=castello.castello.in) by br164.hostgator.com.br with esmtpsa (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128) (Exim 4.91) (envelope-from ) id 1hV5I2-003JNX-TD; Sun, 26 May 2019 23:23:07 -0300 From: Matheus Castello To: sre@kernel.org, krzk@kernel.org, robh+dt@kernel.org Cc: mark.rutland@arm.com, cw00.choi@samsung.com, b.zolnierkie@samsung.com, lee.jones@linaro.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Matheus Castello Subject: [PATCH v3 1/5] power: supply: max17040: Add IRQ handler for low SOC alert Date: Sun, 26 May 2019 23:22:54 -0300 Message-Id: <20190527022258.32748-2-matheus@castello.eng.br> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190527022258.32748-1-matheus@castello.eng.br> References: <20190527022258.32748-1-matheus@castello.eng.br> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - br164.hostgator.com.br X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - castello.eng.br X-BWhitelist: no X-Source-IP: 177.34.20.96 X-Source-L: No X-Exim-ID: 1hV5I2-003JNX-TD X-Source: X-Source-Args: X-Source-Dir: X-Source-Sender: (castello.castello.in) [177.34.20.96]:57660 X-Source-Auth: matheus@castello.eng.br X-Email-Count: 24 X-Source-Cap: Y2FzdGUyNDg7Y2FzdGUyNDg7YnIxNjQuaG9zdGdhdG9yLmNvbS5icg== X-Local-Domain: yes Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org According datasheet max17040 has a pin for alert host for low SOC. This pin can be used as external interrupt, so we need to check for interrupts assigned for device and handle it. In handler we are checking and storing fuel gauge registers values and send an uevent to notificate user space, so user space can decide save work or turn off since the alert demonstrate that the battery may no have the power to keep the system turned on for much longer. Signed-off-by: Matheus Castello --- drivers/power/supply/max17040_battery.c | 65 +++++++++++++++++++++++-- 1 file changed, 60 insertions(+), 5 deletions(-) diff --git a/drivers/power/supply/max17040_battery.c b/drivers/power/supply/max17040_battery.c index 91cafc7bed30..b7433e9ca7c2 100644 --- a/drivers/power/supply/max17040_battery.c +++ b/drivers/power/supply/max17040_battery.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -160,21 +161,40 @@ static void max17040_get_status(struct i2c_client *client) chip->status = POWER_SUPPLY_STATUS_FULL; } +static void max17040_check_changes(struct i2c_client *client) +{ + max17040_get_vcell(client); + max17040_get_soc(client); + max17040_get_online(client); + max17040_get_status(client); +} + static void max17040_work(struct work_struct *work) { struct max17040_chip *chip; chip = container_of(work, struct max17040_chip, work.work); - - max17040_get_vcell(chip->client); - max17040_get_soc(chip->client); - max17040_get_online(chip->client); - max17040_get_status(chip->client); + max17040_check_changes(chip->client); queue_delayed_work(system_power_efficient_wq, &chip->work, MAX17040_DELAY); } +static irqreturn_t max17040_thread_handler(int id, void *dev) +{ + struct max17040_chip *chip = dev; + struct i2c_client *client = chip->client; + + dev_warn(&client->dev, "IRQ: Alert battery low level"); + /* read registers */ + max17040_check_changes(chip->client); + + /* send uevent */ + power_supply_changed(chip->battery); + + return IRQ_HANDLED; +} + static enum power_supply_property max17040_battery_props[] = { POWER_SUPPLY_PROP_STATUS, POWER_SUPPLY_PROP_ONLINE, @@ -220,6 +240,25 @@ static int max17040_probe(struct i2c_client *client, max17040_reset(client); max17040_get_version(client); + /* check interrupt */ + if (client->irq) { + int ret; + unsigned int flags; + + dev_info(&client->dev, "IRQ: enabled\n"); + flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT; + ret = devm_request_threaded_irq(&client->dev, client->irq, NULL, + max17040_thread_handler, flags, + chip->battery->desc->name, + chip); + + if (ret) { + client->irq = 0; + dev_warn(&client->dev, + "Failed to get IRQ err %d\n", ret); + } + } + INIT_DEFERRABLE_WORK(&chip->work, max17040_work); queue_delayed_work(system_power_efficient_wq, &chip->work, MAX17040_DELAY); @@ -244,6 +283,14 @@ static int max17040_suspend(struct device *dev) struct max17040_chip *chip = i2c_get_clientdata(client); cancel_delayed_work(&chip->work); + + if (client->irq) { + if (device_may_wakeup(dev)) + enable_irq_wake(client->irq); + else + disable_irq_wake(client->irq); + } + return 0; } @@ -254,6 +301,14 @@ static int max17040_resume(struct device *dev) queue_delayed_work(system_power_efficient_wq, &chip->work, MAX17040_DELAY); + + if (client->irq) { + if (device_may_wakeup(dev)) + disable_irq_wake(client->irq); + else + enable_irq_wake(client->irq); + } + return 0; } -- 2.20.1